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TS555：Low power single CMOS timer

The TS555 is a single CMOS timer with very low consumption:

(I_cc(TYP)TS555 = 110 μA at V_CC = +5 V versus I_cc(TYP)NE555^(a)= 3 mA),

and high frequency:

(f_f(max.) TS555 = 2.7 MHz versus f_(max)NE555^(a)= 0.1 MHz).

Timing remains accurate in both monostable and astable mode.

The TS555 provides reduced supply current spikes during output transitions, which enable the use of lower decoupling capacitors compared to those required by bipolar NE555^(a).

With the high input impedance (10¹²Ω), timing capacitors can also be minimized.

Key Features

• Very low power consumption:
  • 110 μA typ at VCC = 5 V
  • 90 μa typ at VCC = 3 V
• High maximum astable frequency of 2.7 MHz
• Pin-to-pin functionally-compatible with bipolar NE555(a)
• Wide voltage range: +2 V to +16 V
• Supply current spikes reduced during output transitions
• High input impedance: 1012 Ω
• Output compatible with TTL, CMOS and logic MOS

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