ATF1508RE
| Key | Value |
|---|
| Operating Voltage (Vcc): | 3.3 |
|---|
| I/O Pins: | 100 |
|---|
| Commercial tpd: | 5ns/7ns |
|---|
| Macrocells: | 128 |
|---|
| Power Options: | ULTRA LOW POWER |
|---|
| Registers: | 128 |
|---|
| Usable Gates: | 3000 |
|---|
A high-performance, high-density, complex programmable logic device (CPLD) that uses Atmel's proven electrically-erasable memory technology. With 128 logic macrocells and up to 84 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. Enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications.
DataSheet 数据手册
Application Note
- ATF15xx Power-On Reset Hysteresis Feature(8 页数, 修订版 A, 更新时间: 10/2015)
- ATF15xx Product Family Conversion(7 页数, 更新时间: 03/2001)
ATF15xx Product Family Conversion - Atmel PLD Design Guidelines(12 页数, 更新时间: 09/2000)
- Programming of Atmel PLDs(文件大小: 184KB, 4 页数, 修订版 A, 更新时间: 08/2015)
- Selecting Decoupling Capacitors for Atmel PLDs(4 页数, 更新时间: 09/1999)
- Tips on Using Test Vectors for Atmel PLDs(20 页数, 更新时间: 09/1999)
- Using Programmable Logic Devices(4 页数, 更新时间: 09/1999)
- Using the Programmable Polarity Control(7 页数, 更新时间: 08/1999)
User Guide
White Paper
