Typical DC specs include ±0.1LSB INL, ±0.1LSB DNL. The transition noise is a low 0.08LSBRMS.
A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic.
A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. A data ready output clock (CLKOUT) can be used to latch the output data.
Part Number | Package | Temp | Price(1-99) | Price (1k)* |
---|---|---|---|---|
LTC2281CUP#PBF | 9x9 QFN-64 | C | $25.71 | $18.00 |
LTC2281CUP#TRPBF | 9x9 QFN-64 | C | $18.10 | |
LTC2281IUP#PBF | 9x9 QFN-64 | I | $30.86 | $21.60 |
LTC2281IUP#TRPBF | 9x9 QFN-64 | I | $21.70 |
Part Number | Description | Price |
---|---|---|
DC1098A-A | LTC2281IUP | Dual HSADC, VDD = +3V, 125Msps 10-Bit 1MHz < Ain < 70MHz, (req. DC890) | $200.00 |
DC1098A-D | LTC2281IUP | Dual HSADC, VDD = +3V, 125Msps 10-Bit 70MHz < Ain < 140MHz, (req. DC890) | $200.00 |
Part Number | Description | Price |
---|---|---|
DC890B | USB Data Acquisition Controller, for PScope Evaluation Kits (up to 250Mbps, CMOS/LVDS) | $300.00 |