MAX11642：8-Bit, 16-/8-Channel, 300ksps ADCs with FIFO and Internal Reference

Complete Family of Low-Cost, 8-Bit, 8-/16-Channel ADCs with Internal Reference, FIFO, and SPI Interface

The MAX11638/MAX11639/MAX11642/MAX11643 are serial 8-bit analog-to-digital converters (ADCs) with an internal reference. These devices feature on-chip FIFO, scan mode, internal clock mode, internal averaging, and AutoShutdown™. The maximum sampling rate is 300ksps using an external clock. The MAX11642/MAX11643 have 16 input channels and the MAX11638/MAX11639 have 8 input channels. These four devices operate from either a +3V supply or a +5V supply, and contain a 10MHz SPI/QSPI™/MICROWIRE®-compatible serial port. The MAX11638/MAX11639 are available in 16-pin QSOP packages. The MAX11642/MAX11643 are available in 24-pin QSOP packages. All four devices are specified over the extended -40°C to +85°C temperature range.

Key Features

Analog Multiplexer with Track-and-Hold
- 16 Channels (MAX11642/MAX11643)
- 8 Channels (MAX11638/MAX11639)
Single Supply
- 2.7V to 3.6V (MAX11639/MAX11643)
- 4.75V to 5.25V (MAX11638/MAX11642)
Internal Reference
- 2.5V (MAX11639/MAX11643)
- 4.096V (MAX11638/MAX11642)
External Reference: 1V to VDD
16-Entry First-In/First-Out (FIFO)
Scan Mode, Internal Averaging, and Internal Clock
Accuracy: ±1 LSB INL, ±1 LSB DNL, No Missing Codes Over Temperature
10MHz 3-Wire SPI-/QSPI-/MICROWIRE-Compatible Interface
Small Packages
- 16-Pin QSOP (MAX11638/MAX11639)
- 24-Pin QSOP (MAX11642/MAX11643)

MAX11638, MAX11639, MAX11642, MAX11643: Functional Diagram

Applications/Uses

Data Logging
Data-Acquisition Systems
Industrial Control Systems
Instrumentation
Patient Monitoring
System Supervision

DataSheet

title	Download file
MAX11638-MAX11643 Data Sheet	MAX11638-MAX11643.pdf

Parametrics

Part Number	Resolution (bits)	Input Chan.	Conv. Rate (ksps)	ADC Architecture	Data Bus	Diff/S.E. Input	Internal V_REF (V)	External V_REF (V)	External V_REF (V)	Unipolar V_IN (V)	SNR (dB)	THD (dB)	INL (±LSB)	Package/Pins	Budgetary Price
Part Number	ADC	Input Chan.	max	ADC Architecture	Data Bus	Diff/S.E. Input	nominal	min	max	max	SNR (dB)	THD (dB)	INL (±LSB)	Package/Pins	See Notes
MAX11638	8	8	300	SAR	SPI	S.E. Only	4.096	1	5.25	4.096	49	-70	0.5	QSOP/16	$1.80 @1k
MAX11639		8					2.5		3.6	2.5				QSOP/16	$1.80 @1k
MAX11642		16					4.096		5.25	4.096				QSOP/24	$2.17 @1k
MAX11643		16					2.5		3.6	2.5				QSOP/24	$2.35 @1k

Design kits & evaluation modules

Ordering Information

Part Number	Status	Recommended Replacement	Package	Temp	RoHS
MAX11642EEG+	Active		QSOP,;24 pin;54.2 mm²	-40°C to +85°C	Lead Free
MAX11642EEG+T	Active		QSOP,;24 pin;54.2 mm²	-40°C to +85°C	Lead Free

MAX11638-MAX11643.pdf MAX11643

Choosing the Optimal Clock Mode for MAX116xx, MAX123x, and MAX103x SAR ADCs MAX1231

MAX11638-MAX11643.pdf MAX11639