The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. The MAX9320/MAX9320A feature ultra-low propagation delay (208ps), part-to-part skew (20ps), and output-to-output skew (6ps) with 30mA maximum supply current, making these devices ideal for clock distribution. For interfacing to differential HSTL and LVPECL signals, these devices operate over a +2.25V to +3.8V supply range, allowing high-performance clock or data distribution in systems with a nominal +2.5V or +3.3V supply. For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply. The pinout is the only difference between the MAX9320 and MAX9320A. Multiple pinouts are provided to simplify routing across a backplane to either side of a double-sided board. These devices are offered in space-saving 8-pin SOT23, µMAX®, and SO packages.
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MAX9320-MAX9320A Data Sheet | MAX9320-MAX9320A.pdf |
Part Number | Signal Type | Signal Type | Functions | Rx | Tx | tPD (ps) | VSUPPLY (V) | Package/Pins | Budgetary Price |
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Rx | Tx | max | See Notes | ||||||
MAX9320 | HSTL LVECL LVPECL | LVECL LVPECL | Fan-Out Buffer | 1 | 2 | 270 | 3.3 | µMAX/8 SOIC(N)/8 SOT/8 | $4.19 @1k |
MAX9320A | µMAX/8 SOIC(N)/8 SOT/8 | - | |||||||