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MAX9321, MAX9321A：Differential LVPECL/LVECL/HSTL Receiver/Drivers

The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321/MAX9321A feature ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making these devices ideal for clock buffering or repeating. For interfacing to differential HSTL and LVPECL signals, these devices operate over a +2.25V to +3.8V supply range, allowing high-performance clock and data distribution in systems with a nominal +2.5V or +3.3V supply. For differential LVECL operation, these devices operate from a -2.25V to -3.8V supply. Multiple pinouts are provided to simplify routing across a backplane to either side of a double-sided board. Both devices are offered in space-saving 8-pin SOT23, SO, and µMAX packages.

Key Features Improved Second Source of the MC10LVEP16 (MAX9321) +2.25V to +3.8V Differential HSTL/LVPECL Operation -2.25V to -3.8V Differential LVECL Operation Low 17mA Supply Current 20ps Part-to-Part Skew 172ps Propagation Delay Minimum 300mV Output at 3GHz Output Low for Open Input ESD Protection >2kV (Human Body Model) On-Chip Reference for Single-Ended Input Available in Thermally Enhanced Exposed-Pad SO Package

MAX9321: Pin Configuration Applications/Uses Low-Jitter Data Repeater Precision Clock Buffers

DataSheet

Parametrics

Quality and Environmental Data

• MAX9321.pdf

Related Products

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• MAX9313：1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
• MAX9314：Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
• MAX9320：1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

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