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MAX9425：Lowest Jitter Quad PECL-to-ECL Differential Translators

The MAX9424-MAX9427 high-speed, low-skew quad PECL-to-ECL translators are designed for high-speed data and clock driver applications. These devices feature an ultra-low 0.24ps(RMS) random jitter and channel-to-channel skew is less than 90ps in asynchronous mode. The four channels can be operated synchronously with an external clock, or in asynchronous mode determined by the state of the SEL input. An enable input provides the ability to force all the outputs to a differential low state. The parts differ from one another by their input and output termination options. The input options are an open input or an internal differential 100Ω termination. The output options are an open-emitter output or a series 50Ω termination. See Ordering Information. The MAX9424-MAX9427 operate from a positive voltage supply of +2.375V to +5.5V, and a negative supply voltage of -2.375V to -5.5V and operate across the extended temperature range of -40°C to +85°C. They are offered in 32-pin 5mm x 5mm TQFP and space-saving 5mm x 5mm QFN packages.

Key Features 0.24psRMS Added Random Jitter 10ps Channel-to-Channel Skew in Synchronous Mode Guaranteed 500mV Differential Output at 3GHz Clock Frequency 420ps Propagation Delay in Asynchronous Mode Functionally Compatible with SK4426 (MAX9424) SK4430 (MAX9425) SK4436 (MAX9426) SK4440 (MAX9427) Integrated 50Ω Outputs (MAX9425/MAX9427) Integrated 100Ω Inputs (MAX9426/MAX9427) Synchronous/Asynchronous Operation

MAX9424, MAX9425, MAX9426, MAX9427: Functional Diagram Applications/Uses Cell Phones/Cordless Phones

DataSheet

Parametrics

Design kits & evaluation modules

• MAX9424EVKIT

Related Products

• MAX9405：Quad Differential LVECL/LVPECL Buffer/Receivers
• MAX9403：Quad Differential LVECL/LVPECL Buffer/Receivers
• MAX9402：Quad Differential LVECL/LVPECL Buffer/Receivers
• MAX9400：Quad Differential LVECL/LVPECL Buffer/Receivers

Ordering Information