Features

• Supports two independent PCI Express slots
• SMBus interface for slot power control and status
• Voltage-tolerant I/O for compatibility with SMBus 2.0 systems
• 12V, 3.3V, and 3.3VAUXsupplies supported per PCI Express Specifi cation v1.0a Intergrated power MOSFETs for 3.3VAUX rails Standby operation for Wake-on-LAN applications with low backfeed on Main +12V and +3.3V rails.
• Intergrated power MOSFETs for 3.3VAUX rails
• Standby operation for Wake-on-LAN applications with low backfeed on Main +12V and +3.3V rails.
• On-chip circuitry for data collection of each rail output voltage and output current for both slots Integral analog multiplexer and 8-bit Δ∑ADC
• Integral analog multiplexer and 8-bit Δ∑ADC
• Compliant to the Intelligent Platform Management Interface (IPMI) Specifi cation v1.0
• Conversion results available via an SMBus interface
• Programmable inrush current limiting
• Active current regulation controls inrush current
• Electronic circuit breaker for each supply to each slot
• High accuracies for both circuit breaker trip points and nuisance trip prevention timers
• Dual level fault detection for quick fault response without nuisance tripping
• Thermal isolation between circuitry for Slot A and Slot B
• Two General Purpose Input pins suitable for interface to logic and switches.

Parameter