Features

• Up to 16 MIPS performance
• Modified Harvard architecture
• 16-bit wide data path
• 24-bit wide instructions
• 16 x 16 integer multiply operations
• 32/16 and 16/16 integer divide operations
• Flash program memory (16 Kbytes)
• Data SRAM (1 Kbyte)
• Security for program Flash
• 6-channel 16-bit Motor Control PWM:Three duty cycle generators Independent or Complementary mode Programmable dead time and output polarity Edge-aligned or center-aligned
• Three duty cycle generators
• Independent or Complementary mode
• Programmable dead time and output polarity
• Edge-aligned or center-aligned
• 10-bit, 1.1 Msps Analog-to-Digital Converter (ADC):Two and four simultaneous samples Up to six input channels with auto-scanning
• Two and four simultaneous samples
• Up to six input channels with auto-scanning
• Three Analog Comparators with programmable input/output configuration:Up to four inputs per Comparator
• Up to four inputs per Comparator
• Charge Time Measurement Unit (CTMU):Supports capacitive touch sensing for touch screens and capacitive switches (mTouch™)
• Supports capacitive touch sensing for touch screens and capacitive switches (mTouch™)
• Timer/Counters, up to three 16-bit timers:Can pair up to make two 32-bit timers
• Can pair up to make two 32-bit timers
• Input Capture (up to three channels):Capture on up, down or both edges 16-bit capture input functions
• Capture on up, down or both edges
• 16-bit capture input functions
• Output Compare (up to four channels):Single or Dual 16-bit Compare mode
• Single or Dual 16-bit Compare mode
• Hardware Real-Time Clock/Calendar (RTCC)
• 4-wire SPI
• I2C™
• UART (up to two modules)
• Flexible clock options
• High-accuracy internal FRC
• Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Single supply on-chip voltage regulator
• Switch between clock sources in real time
• Idle, Sleep, and Doze modes with fast wake-up
• 28-pin SPDIP/SOIC/SSOP/QFN
• 28-pin QFN: 6x6 mm
• 36-pin TLA: 5x5 mm

Parameter