MC10EP101: 3.3 V / 5.0 V ECL Quad 4-Input OR/NOR Gate

The MC10/100EP101 is a Quad 4-input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the fastest AC performance available.The 100 Series contains temperature compensation.

Features
  • 250 ps Typical Propagation Delay
  • Maximum Frequency > 3 Ghz Typical
  • PECL mode Operating Range: 3.0V to 5.5V VCC with VEE = 0V
  • NECL Mode Operating Range: VCC=0 V with VEE = -3.0V to -5.5V
  • Open Input Default State
  • Pb-Free Packages are Available
Applications
  • High Performance Logic for test systems
Application Notes (11)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
Designing with PECL (ECL at +5.0 V)AN1406/D (105.0kB)2
ECL Clock Distribution TechniquesAN1405/D (54.0kB)1
ECLinPS Plus™ Spice Modeling KitAND8009/D (343.0kB)11
Interfacing Between LVDS and ECLAN1568/D (121.0kB)11
Interfacing with ECLinPSAND8066/D (72kB)3
Metastability and the ECLinPS FamilyAN1504/D (103.0kB)3
Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksAND8001/D (90.0kB)0
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
The ECL Translator GuideAN1672/D (142.0kB)12
Package Drawings (1)
Document TitleDocument ID/SizeRevision
QFN32, 5x5, 0.5P, 3.1x3.1EP488AM (57.4kB)A
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
3.3V / 5V ECL Quad 4-Input OR/NORMC10EP101/D (154.0kB)11
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
MC10EP101FAGActivePb-free Halide freeLQFP-32Contact BDTIC2Tray JEDEC250Contact BDTIC
MC10EP101FAR2GLifetimePb-free Halide freeLQFP-32Contact BDTIC2Tape and Reel2000
MC10EP101MNGLifetimePb-free Halide freeQFN-32488AM1Tube74
MC10EP101MNR4GLifetimePb-free Halide freeQFN-32488AM1Tape and Reel1000
Specifications
ProductTypeChannelsInput LevelOutput LevelVCC Typ (V)fToggle Max (MHz)tpd Typ (ns)tJitter Typ (ps)tR & tF Max (ps)
MC10EP101FAGOR/NOR4CML ECLECL3.3 530000.30.2200
3.3V / 5V ECL Quad 4-Input OR/NOR (154.0kB) MC10EP101
AC Characteristics of ECL Devices NB100LVEP91
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
Designing with PECL (ECL at +5.0 V) NB100LVEP91
ECL Clock Distribution Techniques NB100LVEP91
ECLinPS Plus™ Spice Modeling Kit MC10EPT20
Interfacing Between LVDS and ECL NB100ELT23L
Interfacing with ECLinPS NB100LVEP91
Metastability and the ECLinPS Family MC10EPT20
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks NUP4201
Termination of ECL Logic Devices NB100LVEP91
The ECL Translator Guide NB100LVEP91
QFN32, 5x5, 0.5P, 3.1x3.1EP NCN6804