CD54HC190 高速 CMOS 逻辑可预设的同步 4 位 BCD 码十进制加/减计数器
The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters.
Presetting the counter to the number on preset data inputs (A–D) is accomplished by a low asynchronous parallel load (LOAD)\ input. Counting occurs when LOAD\ is high, count enable (CTEN)\ is low, and the down/up (D/U) input is either high for down counting or low for up counting. The counter is decremented or incremented synchronously with the low-to-high transition of the clock.
When an overflow or underflow of the counter occurs, the MAX/MIN output, which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high-speed cascading (see Figure 1).
| CD54HC190 | |
| Rating | Military |
| Technology Family | HC |
CD54HC190 特性
- 2-V to 6-V VCC Operation (’HC190,191)
- 4.5-V to 5.5-V VCC Operation (’HCT191)
- Wide Operating Temperature Range of –55 to 125°C
- Synchronous Counting and Asynchronous Loading
- Two Outputs for n-Bit Cascading
- Look-Ahead Carry for High-Speed Counting
- Balanced Propagation Delay and Transition Times
- Standard Outputs Drive Up To 15 LS-TTL Loads
- Significant Power Reduction Compared to LS-TTL Logic ICs
CD54HC190 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 5962-8994601EA | ACTIVE | -55 to 125 | 5.65 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| CD54HC190F3A | ACTIVE | -55 to 125 | 5.65 | 1ku | CDIP (J) | 16 | 1 | TUBE |
CD54HC190 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 5962-8994601EA | TBD | A42 | N/A for Pkg Type | 5962-8994601EA | 5962-8994601EA |
| CD54HC190F3A | TBD | A42 | N/A for Pkg Type | CD54HC190F3A | CD54HC190F3A |
CD54HC190 应用技术支持与电子电路设计开发资源下载
- CD54HC190 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
