SN54180 9 位奇/偶校验发生器/校验器
These universal, monolithic, 9-bit (8 data bits plus 1 parity bit) parity generators/checkers, utilize familiar Series 54/74 TTL circuitry and feature odd/even outputs and control inputs to facilitate operation in either odd or even-parity applications. Depending on whether even or odd parity is being generated or checked, the even or odd inputs can be utilized as the parity or 9th-bit input. The word-length capability is easily expanded by cascading.
The SN54180/SN74180 are fully compatible with other TTL or DTL circuits. Input buffers are provided so that each data input represents only one normalized series 54/74 load. A full fan-out to 10 normalized series 54/74 loads is available from each of the outputs at a low logic level
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SN54180 |
Rating |
Military |
Technology Family |
TTL |
SN54180 特性
- Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25°C
- Replaces LS180 Types
- Easily Cascadable
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range... –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
SN54180 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
SN54180J |
ACTIVE |
-55 to 125 |
4.84 | 1ku |
CDIP (J) | 14 |
1 | TUBE |
|
SNJ54180J |
ACTIVE |
-55 to 125 |
5.72 | 1ku |
CDIP (J) | 14 |
1 | TUBE |
|
SNJ54180W |
ACTIVE |
-55 to 125 |
17.72 | 1ku |
CFP (W) | 14 |
1 | TUBE |
|
SN54180 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
SN54180J |
TBD |
A42 |
N/A for Pkg Type |
SN54180J |
SN54180J |
SNJ54180J |
TBD |
A42 |
N/A for Pkg Type |
SNJ54180J |
SNJ54180J |
SNJ54180W |
TBD |
A42 |
N/A for Pkg Type |
SNJ54180W |
SNJ54180W |
SN54180 应用技术支持与电子电路设计开发资源下载
- SN54180 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)