SN54ALS191A 同步 4 位加/减二进制计数器
The 'ALS191A are synchronous 4-bit reversible up/down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters.
The outputs of the four flip-flops are triggered on a low-to-high-level transition of the clock (CLK) input if the count enable () input is low. A high at inhibits counting. The direction of the count is determined by the level of the down/up (D/U\) input. When D/U\ is low, the counter counts up, and when D/U\ is high, the counter counts down
| SN54ALS191A | |
| Rating | Military |
| Technology Family | ALS |
SN54ALS191A 特性
- Single Down/Up Count-Control Line
- Look-Ahead Circuitry Enhances Speed of Cascaded Counters
- Fully Synchronous in Count Modes
- Asynchronously Presettable With Load Control
- Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
SN54ALS191A 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54ALS191AJ | ACTIVE | -55 to 125 | 5.46 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54ALS191AFK | ACTIVE | -55 to 125 | 17.21 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54ALS191AJ | ACTIVE | -55 to 125 | 6.40 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54ALS191AW | ACTIVE | -55 to 125 | 15.96 | 1ku | CDIP (J) | 16 | 1 | TUBE |
SN54ALS191A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54ALS191AJ | TBD | A42 | N/A for Pkg Type | SN54ALS191AJ | SN54ALS191AJ |
| SNJ54ALS191AFK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54ALS191AFK | SNJ54ALS191AFK |
| SNJ54ALS191AJ | TBD | A42 | N/A for Pkg Type | SNJ54ALS191AJ | SNJ54ALS191AJ |
| SNJ54ALS191AW | TBD | A42 | N/A for Pkg Type | SNJ54ALS191AW | SNJ54ALS191AW |
SN54ALS191A 应用技术支持与电子电路设计开发资源下载
- SN54ALS191A 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
