SN54ALS193A 具有双时钟的同步 4 位加/减二进制计数器

The 'ALS193A are synchronous, reversible, 4-bit up/down binary counters. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters.

The outputs of the four flip-flops are triggered on a low-to-high-level transition of either count/clock (UP or DOWN) input. The direction of the count is determined by which count input is pulsed while the other count input is high.

All four counters are fully programmable; that is, each output may be preset to either level by placing a low on the load () input and entering the desired data at the data inputs

SN54ALS193A
Rating Military  
Technology Family ALS  
SN54ALS193A 特性
SN54ALS193A 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN54ALS193AJ ACTIVE -55 to 125 5.46 | 1ku CDIP (J) | 16 1 | TUBE  
SNJ54ALS193AFK ACTIVE -55 to 125 17.21 | 1ku LCCC (FK) | 20 1 | TUBE  
SNJ54ALS193AJ ACTIVE -55 to 125 6.40 | 1ku CDIP (J) | 16 1 | TUBE  
SNJ54ALS193AW ACTIVE -55 to 125 15.96 | 1ku CDIP (J) | 16 1 | TUBE  
SN54ALS193A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN54ALS193AJ TBD  A42   N/A for Pkg Type SN54ALS193AJ SN54ALS193AJ
SNJ54ALS193AFK TBD  POST-PLATE  N/A for Pkg Type SNJ54ALS193AFK SNJ54ALS193AFK
SNJ54ALS193AJ TBD  A42   N/A for Pkg Type SNJ54ALS193AJ SNJ54ALS193AJ
SNJ54ALS193AW TBD  A42   N/A for Pkg Type SNJ54ALS193AW SNJ54ALS193AW
SN54ALS193A 应用技术支持与电子电路设计开发资源下载
  1. SN54ALS193A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)