SN54F283 具有快速进位功能的 4 位二进制全加器
The ´F283 is a full adder that performs the addition of two 4-bit binary words. The sum ( ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit.
The device features full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.
The adder logic, including the carry, is implemented in its true form. End-around carry can be accomplished without the need for logic or level inversion.
The ´F283 can be used with either all-active-high (positive logic) or all-active-low (negative logic) operands
| SN54F283 | |
| Rating | Military |
| Technology Family | F |
SN54F283 特性
- Full-Carry Look-Ahead Across the Four Bits
- Systems Achieve Partial Look-Ahead Performance With the Economy of Ripple Carry
- Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
SN54F283 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54F283J | ACTIVE | -55 to 125 | 1.84 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54F283FK | ACTIVE | -55 to 125 | 5.69 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54F283J | ACTIVE | -55 to 125 | 2.17 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54F283W | OBSOLETE | -55 to 125 | CFP (W) | 16 |
SN54F283 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54F283J | TBD | A42 | N/A for Pkg Type | SN54F283J | SN54F283J |
| SNJ54F283FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54F283FK | SNJ54F283FK |
| SNJ54F283J | TBD | A42 | N/A for Pkg Type | SNJ54F283J | SNJ54F283J |
SN54F283 应用技术支持与电子电路设计开发资源下载
- SN54F283 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
