SN54HC161-SP 同步 4 位二进制计数器
These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The ’HC161 devices are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.
These counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15
| SN54HC161-SP | |
| Rating | Space |
| Technology Family | HC |
SN54HC161-SP 特性
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 80-µA Max ICC
- Typical tpd = 14 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 µA Max
- Internal Look-Ahead for Fast Counting
- Carry Output for n-Bit Cascading
- Synchronous Counting
- Synchronously Programmable
SN54HC161-SP 芯片订购指南
| 器件 | 状态 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 5962-8407501VEA | ACTIVE | 115.12 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| 5962-8407501VFA | ACTIVE | 120.12 | 1ku | CDIP (J) | 16 | 1 | TUBE |
SN54HC161-SP 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 5962-8407501VEA | TBD | A42 | N/A for Pkg Type | 5962-8407501VEA | 5962-8407501VEA |
| 5962-8407501VFA | TBD | A42 | N/A for Pkg Type | 5962-8407501VFA | 5962-8407501VFA |
SN54HC161-SP 应用技术支持与电子电路设计开发资源下载
- SN54HC161-SP 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
