SN54HC393 同步 4 位加/减二进制计数器
The ’HC393 devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices comprise two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK) input. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The ’HC393 devices have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.
| SN54HC393 | |
| Rating | Military |
| Technology Family | HC |
SN54HC393 特性
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 80-µA Max ICC
- Typical tpd = 13 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 µA Max
- Dual 4-Bit Binary Counters With Individual Clocks
- Direct Clear for Each 4-Bit Counter
- Can Significantly Improve System Densities by Reducing Counter Package Count by 50 Percent
SN54HC393 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54HC393J | ACTIVE | -55 to 125 | 1.91 | 1ku | CDIP (J) | 14 | 1 | TUBE | |
| SNJ54HC393FK | ACTIVE | -55 to 125 | 17.37 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54HC393J | ACTIVE | -55 to 125 | 3.46 | 1ku | CDIP (J) | 14 | 1 | TUBE | |
| SNJ54HC393W | ACTIVE | -55 to 125 | 15.12 | 1ku | CFP (W) | 14 | 1 | TUBE |
SN54HC393 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54HC393J | TBD | A42 | N/A for Pkg Type | SN54HC393J | SN54HC393J |
| SNJ54HC393FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54HC393FK | SNJ54HC393FK |
| SNJ54HC393J | TBD | A42 | N/A for Pkg Type | SNJ54HC393J | SNJ54HC393J |
| SNJ54HC393W | TBD | A42 | N/A for Pkg Type | SNJ54HC393W | SNJ54HC393W |
SN54HC393 应用技术支持与电子电路设计开发资源下载
- SN54HC393 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
