SN54HC4020 同步 4 位加/减二进制计数器

The ’HC4020 devices are 14-stage binary ripple-carry counters that advance on the negative-going edge of the clock pulse. The counters are reset to zero (all outputs low) independently of the clock (CLK) input when the clear (CLR) input goes high.

SN54HC4020
Rating Military  
Technology Family HC  
SN54HC4020 特性
SN54HC4020 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN54HC4020J ACTIVE -55 to 125 1.91 | 1ku CDIP (J) | 14 1 | TUBE  
SNJ54HC4020FK ACTIVE -55 to 125 17.37 | 1ku LCCC (FK) | 20 1 | TUBE  
SNJ54HC4020J ACTIVE -55 to 125 3.46 | 1ku CDIP (J) | 14 1 | TUBE  
SNJ54HC4020W ACTIVE -55 to 125 15.12 | 1ku CFP (W) | 14 1 | TUBE  
SN54HC4020 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN54HC4020J TBD  A42   N/A for Pkg Type SN54HC4020J SN54HC4020J
SNJ54HC4020FK TBD  POST-PLATE  N/A for Pkg Type SNJ54HC4020FK SNJ54HC4020FK
SNJ54HC4020J TBD  A42   N/A for Pkg Type SNJ54HC4020J SNJ54HC4020J
SNJ54HC4020W TBD  A42   N/A for Pkg Type SNJ54HC4020W SNJ54HC4020W
SN54HC4020 应用技术支持与电子电路设计开发资源下载
  1. SN54HC4020 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)