SN54LS251 具有三态输出的数据选择器/多路复用器
These monolithic data selectors/multiplexers contain full on-chip binary decoding to select one-of-eight data sources and feature a strobe-controlled three-state output. The strobe must be at a low logic level to enable these devices. The three-state outputs permit a number of outputs to be connected to a common bus. When the strobe input is high, both outputs are in a high-impedance state in which both the upper and lower transistors of each totem-pole output are off, and the output neither drives nor loads the bus significantly. When the strobe is low, the outputs are activated and operate as standard TTL totem-pole outputs.
To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable time is shorter than the average output enable time
| SN54LS251 | |
| Rating | Military |
| Technology Family | LS |
SN54LS251 特性
- Three-State Versions of '151, 'LS151, 'S151
- Three State Outputs Interface Directly with System Bus
- Perform Parallel-to-Serial Conversion
- Permit Multiplexing from N-Lines to One Line
- Complementary Outputs Provide True and Inverted Data
- Fully Compatible with Most TTL Circuits
SN54LS251 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54LS251J | ACTIVE | -55 to 125 | 15.25 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS251J | ACTIVE | -55 to 125 | 12.46 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS251W | ACTIVE | -55 to 125 | 18.57 | 1ku | CFP (W) | 16 | 1 | TUBE |
SN54LS251 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54LS251J | TBD | A42 | N/A for Pkg Type | SN54LS251J | SN54LS251J |
| SNJ54LS251J | TBD | A42 | N/A for Pkg Type | SNJ54LS251J | SNJ54LS251J |
| SNJ54LS251W | TBD | A42 | N/A for Pkg Type | SNJ54LS251W | SNJ54LS251W |
SN54LS251 应用技术支持与电子电路设计开发资源下载
- SN54LS251 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
