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SN54LS390 双路 4 位十进制和二进制计数器

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256.

	SN54LS390
Rating	Military
Technology Family	LS

SN54LS390 特性

• Dual Versions of the Popular '90A, 'LS90 and '93A, 'LS93
• '390, 'LS390 … Individual Clocks for A and B Flip-Flops Provide Dual ÷ 2 and ÷ 5 Counters
• '393, 'LS393 … Dual 4-Bit Binary Counter with Individual Clocks
• All Have Direct Clear for Each 4-Bit Counter
• Dual 4-Bit Versions Can Significantly Improve System Densities by Reducing Counter Package Count by 50%
• Typical Maximum Count Frequency … 35 MHz
• Buffered Outputs Reduce Possibility of Collector Commutation

SN54LS390 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN54LS390J	ACTIVE	-55 to 125	4.34 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54LS390FK	ACTIVE	-55 to 125	14.61 | 1ku	LCCC (FK) | 20	1 | TUBE
SNJ54LS390J	ACTIVE	-55 to 125	5.13 | 1ku	CDIP (J) | 16	1 | TUBE
SNJ54LS390W	ACTIVE	-55 to 125	14.61 | 1ku	CFP (W) | 16	1 | TUBE

SN54LS390 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN54LS390E	TBD	A42	N/A for Pkg Type	SN54LS390E	SN54LS390E
SN54LS390EE4	TBD	POST-PLATE	N/A for Pkg Type	SN54LS390EE4	SN54LS390EE4
SN54LS390NSR	TBD	A42	N/A for Pkg Type	SN54LS390NSR	SN54LS390NSR
SN54LS390NSRE4	TBD	A42	N/A for Pkg Type	SN54LS390NSRE4	SN54LS390NSRE4

SN54LS390 应用技术支持与电子电路设计开发资源下载

1. SN54LS390 数据资料 dataSheet 下载.PDF
2. TI 德州仪器MSI 功能产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)