SN54LS669 同步 4 位加/减计数器
These synchronous presettable counters feature an internal carry look-ahead for cascading in high-speed counting applications. The 'LS668 are decade counters and the 'LS669 are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. A buffered clock input triggers the four master-slave flip-flops on the rising (positive-going) edge of the clock waveform.
These counters are fully programmable; that is, the outputs may each be preset to either level
| SN54LS669 | |
| Rating | Military |
| Technology Family | LS |
SN54LS669 特性
- Fully Synchronous Operation for Counting and Programming
- Internal Look-Ahead for Fast Counting
- Carry Output for n-Bit Cascading
- Fully Independent Clock Circuit
- Buffered Outputs
SN54LS669 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54LS669J | ACTIVE | -55 to 125 | 1.91 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS669FK | ACTIVE | -55 to 125 | 17.37 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54LS669J | ACTIVE | -55 to 125 | 3.46 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54LS669W | ACTIVE | -55 to 125 | 15.12 | 1ku | CFP (W) | 16 | 1 | TUBE |
SN54LS669 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54LS669J | TBD | A42 | N/A for Pkg Type | SN54LS669J | SN54LS669J |
| SNJ54LS669FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54LS669FK | SNJ54LS669FK |
| SNJ54LS669J | TBD | A42 | N/A for Pkg Type | SNJ54LS669J | SNJ54LS669J |
| SNJ54LS669W | TBD | A42 | N/A for Pkg Type | SNJ54LS669W | SNJ54LS669W |
SN54LS669 应用技术支持与电子电路设计开发资源下载
- SN54LS669 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
