SN54S85 4 位幅度比较器
These four-bit magnitude comparators perform comparison of straight binary and straight BCD (8-4-2-1) codes. Three fully decoded decisions about two 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external gates. Words of greater length may be compared by connecting comparators in cascade. The A > B, A < B, and A = B outputs of a stage handling less-significant bits are connected to the corresponding A > B, A < B, and A = B inputs of the next stage handling more-significant bits. The stage handling the least-significant bits must have a high-level voltage applied to the A = B input. The cascading paths of the '85, 'LS85, and 'S85 are implemented with only a two-gate-level delay to reduce overall comparison times for long words.
|
SN54S85 |
| Rating |
Military |
| Technology Family |
S |
SN54S85 特性
- Compares Two-8-Bit Words
- Choice of Totem-Pole or Open-Collector Outputs
- Hysteresis at P and Q Inputs
- 'LS682 has 20-k
Pullup Resistors on the Q Inputs
- SN74LS686 and 'LS687 … JT and NT 24-Pin, 300-Mil Packages
SN54S85 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN54S85J |
ACTIVE |
-55 to 125 |
3.08 | 1ku |
CDIP (J) | 16 |
1 | TUBE |
|
| SNJ54S85FK |
ACTIVE |
-55 to 125 |
13.47 | 1ku |
LCCC (FK) | 20 |
1 | TUBE |
|
| SNJ54S85J |
ACTIVE |
-55 to 125 |
3.61 | 1ku |
CDIP (J) | 16 |
1 | TUBE |
|
SN54S85 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN54S85J |
TBD |
A42 |
N/A for Pkg Type |
SN54S85J |
SN54S85J |
| SNJ54S85FK |
TBD |
POST-PLATE |
N/A for Pkg Type |
SNJ54S85FK |
SNJ54S85FK |
| SNJ54S85J |
TBD |
A42 |
N/A for Pkg Type |
SNJ54S85J |
SNJ54S85J |
SN54S85 应用技术支持与电子电路设计开发资源下载
- SN54S85 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
