CD74HC4024 高速 CMOS 逻辑 7 级二进制纹波计数器
The ’HC4024 and ’HCT4024 are 7-stage ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of the stage advances one count on the negative transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.
| CD74HC4024 | |
| Rating | Catalog |
| Technology Family | HC |
CD74HC4024 特性
- Fully Static Operation
- Buffered Inputs
- Common Reset
- Negative Edge Clocking
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1µA at VOL, VOH
CD74HC4024 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD74HC4024E | ACTIVE | -55 to 125 | 0.39 | 1ku | PDIP (N) | 14 | 25 | TUBE | |
| CD74HC4024EE4 | ACTIVE | -55 to 125 | 0.39 | 1ku | PDIP (N) | 14 | 25 | TUBE | |
| CD74HC4024M | ACTIVE | -55 to 125 | 0.42 | 1ku | SOIC (D) | 14 | 40 | TUBE | |
| CD74HC4024M96 | ACTIVE | -55 to 125 | 0.35 | 1ku | SOIC (D) | 14 | 2500 | LARGE T&R | |
| CD74HC4024M96E4 | ACTIVE | -55 to 125 | 0.35 | 1ku | SOIC (D) | 14 | 2500 | LARGE T&R | |
| CD74HC4024M96G4 | ACTIVE | -55 to 125 | 0.35 | 1ku | SOIC (D) | 14 | 2500 | LARGE T&R | |
| CD74HC4024ME4 | ACTIVE | -55 to 125 | 0.42 | 1ku | SOIC (D) | 14 | 40 | TUBE | |
| CD74HC4024MG4 | ACTIVE | -55 to 125 | 0.42 | 1ku | SOIC (D) | 14 | 40 | TUBE |
CD74HC4024 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD74HC4024E | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HC4024E | CD74HC4024E |
| CD74HC4024EE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HC4024EE4 | CD74HC4024EE4 |
| CD74HC4024M | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024M | CD74HC4024M |
| CD74HC4024M96 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024M96 | CD74HC4024M96 |
| CD74HC4024M96E4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024M96E4 | CD74HC4024M96E4 |
| CD74HC4024M96G4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024M96G4 | CD74HC4024M96G4 |
| CD74HC4024ME4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024ME4 | CD74HC4024ME4 |
| CD74HC4024MG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HC4024MG4 | CD74HC4024MG4 |
CD74HC4024 应用技术支持与电子电路设计开发资源下载
- CD74HC4024 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
