The CD54HC646 and CD74HCT646 consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with these devices.
Output-enable (OE\) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data
CD74HCT646 | |
Technology Family | ACT |
Rating | Catalog |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
CD74HCT646M96 | ACTIVE | -55 to 125 | 1.60 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | HCT646 |
CD74HCT646M96E4 | ACTIVE | -55 to 125 | 1.60 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | ACT646 |
CD74HCT646M96G4 | ACTIVE | -55 to 125 | 1.60 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | ACT646 |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
CD74HCT646M96 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT646M96 | CD74HCT646M96 |
CD74HCT646M96E4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT646M96E4 | CD74HCT646M96E4 |
CD74HCT646M96G4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT646M96G4 | CD74HCT646M96G4 |