SN74AHCT00-EP 四路 2 输入正与非门
The ’AHCT00 device performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic.
| SN74AHCT00-EP | |
| Rating | HiRel Enhanced Product |
| Technology Family | AHCT |
SN74AHCT00-EP 特性
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Inputs Are TTL-Voltage Compatible
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN74AHCT00-EP 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74AHCT00MDREP | ACTIVE | -55 to 125 | 0.49 | 1ku | SOIC (D) | 14 | 2500 | LARGE T&R | |
| SN74AHCT00MPWREP | ACTIVE | -55 to 125 | 0.49 | 1ku | TSSOP (PW) | 14 | 2000 | LARGE T&R | |
| V62/03653-01XE | ACTIVE | -55 to 125 | 0.49 | 1ku | SOIC (D) | 14 | 2500 | LARGE T&R | |
| V62/03653-01YE | ACTIVE | -55 to 125 | 0.49 | 1ku | TSSOP (PW) | 14 | 2000 | LARGE T&R |
SN74AHCT00-EP 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74AHCT00MDREP | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AHCT00MDREP | SN74AHCT00MDREP |
| SN74AHCT00MPWREP | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74AHCT00MPWREP | SN74AHCT00MPWREP |
| V62/03653-01XE | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | V62/03653-01XE | V62/03653-01XE |
| V62/03653-01YE | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | V62/03653-01YE | V62/03653-01YE |
SN74AHCT00-EP 应用技术支持与电子电路设计开发资源下载
- SN74AHCT00-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器门电路产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
