SN74AUP1T97 单电源电压转换器

AUP technology is the industry’s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.

The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range.

Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition

SN74AUP1T97
Voltage Nodes(V) 2.5, 3.3  
Vcc range(V) 2.3 to 3.6  
No. of Bits 3  
No. of Outputs 1  
Bus Drive(ma) -4/4  
Static Current 0.0005  
tpd max(ns) 3.5  
Pin/Package 6DSBGA, 6SC70, 6SON, 6SOT-23  
Technology Family AUP  
Operating Temperature Range(°C) -40 to 85
SN74AUP1T97 特性
SN74AUP1T97 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AUP1T97DBVR ACTIVE -40 to 85 0.24 | 1ku SOT-23 (DBV) | 6 3000 | LARGE T&R  
SN74AUP1T97DBVRE4 ACTIVE -40 to 85 0.24 | 1ku SOT-23 (DBV) | 6 3000 | LARGE T&R  
SN74AUP1T97DBVRG4 ACTIVE -40 to 85 0.24 | 1ku SOT-23 (DBV) | 6 3000 | LARGE T&R  
SN74AUP1T97DBVT ACTIVE -40 to 85 0.57 | 1ku SOT-23 (DBV) | 6 250 | SMALL T&R  
SN74AUP1T97DBVTE4 ACTIVE -40 to 85 0.57 | 1ku SOT-23 (DBV) | 6 250 | SMALL T&R  
SN74AUP1T97DBVTG4 ACTIVE -40 to 85 0.57 | 1ku SOT-23 (DBV) | 6 250 | SMALL T&R  
SN74AUP1T97DCKR ACTIVE -40 to 85 0.29 | 1ku SC70 (DCK) | 6 3000 | LARGE T&R  
SN74AUP1T97DCKRE4 ACTIVE -40 to 85 0.29 | 1ku SC70 (DCK) | 6 3000 | LARGE T&R  
SN74AUP1T97DCKRG4 ACTIVE -40 to 85 0.29 | 1ku SC70 (DCK) | 6 3000 | LARGE T&R  
SN74AUP1T97DRYR ACTIVE -40 to 85 0.29 | 1ku SON (DRY) | 6 5000 | LARGE T&R  
SN74AUP1T97DSFR ACTIVE -40 to 85 0.29 | 1ku SON (DSF) | 6 5000 | LARGE T&R  
SN74AUP1T97YFPR ACTIVE -40 to 85 0.29 | 1ku DSBGA (YFP) | 6 3000 | LARGE T&R  
SN74AUP1T97YZPR ACTIVE -40 to 85 0.29 | 1ku DSBGA (YZP) | 6 3000 | LARGE T&R  
SN74AUP1T97 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AUP1T97DBVR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVR SN74AUP1T97DBVR
SN74AUP1T97DBVRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVRE4 SN74AUP1T97DBVRE4
SN74AUP1T97DBVRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVRG4 SN74AUP1T97DBVRG4
SN74AUP1T97DBVT Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVT SN74AUP1T97DBVT
SN74AUP1T97DBVTE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVTE4 SN74AUP1T97DBVTE4
SN74AUP1T97DBVTG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DBVTG4 SN74AUP1T97DBVTG4
SN74AUP1T97DCKR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DCKR SN74AUP1T97DCKR
SN74AUP1T97DCKRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DCKRE4 SN74AUP1T97DCKRE4
SN74AUP1T97DCKRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DCKRG4 SN74AUP1T97DCKRG4
SN74AUP1T97DRYR Green (RoHS & no Sb/Br)  NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DRYR SN74AUP1T97DRYR
SN74AUP1T97DSFR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP1T97DSFR SN74AUP1T97DSFR
SN74AUP1T97YFPR Green (RoHS & no Sb/Br)  Call TI  Level-1-260C-UNLIM SN74AUP1T97YFPR SN74AUP1T97YFPR
SN74AUP1T97YZPR Green (RoHS & no Sb/Br)  SNAGCU  Level-1-260C-UNLIM SN74AUP1T97YZPR SN74AUP1T97YZPR
SN74AUP1T97 应用技术支持与电子电路设计开发资源下载
  1. SN74AUP1T97 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器电压电平转换产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)