The SN74FB1653 contains an 8-bit and a 9-bit transceiver with a buffered clock. The clock and transceivers are designed to translate signals between LVTTL and BTL environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991 (BTL).
The A port operates at LVTTL signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC(5 V) typically is less than 2.5 V, the A outputs are in the high-impedance state.
The B\ port operates at BTL signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB)\ are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC(5 V) typically is less than 2
| SN74FB1653 | |
| Voltage Nodes(V) | 5, 3.3 |
| Vcc range(V) | TTL |
| Bus Drive(ma) | BTL |
| No. of Outputs | -3/100 |
| No. of Bits | 17 |
| Logic | 1 |
| Static Current | 3.5 |
| tpd max(ns) | 145 |
| Rating | Catalog |
| Technology Family | FB |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74FB1653PCA | ACTIVE | 0 to 70 | 24.20 | 1ku | HLQFP (PCA) | 100 | 90 | JEDEC TRAY (10+1) | |
| SN74FB1653PCAG4 | ACTIVE | 0 to 70 | 24.20 | 1ku | HLQFP (PCA) | 100 | 90 | JEDEC TRAY (10+1) |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74FB1653PCA | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-3-260C-168 HR | SN74FB1653PCA | SN74FB1653PCA |
| SN74FB1653PCAG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-3-260C-168 HR | SN74FB1653PCAG4 | SN74FB1653PCAG4 |
