The SN74FB2033A is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level A port. The common-I/O, open-collector B\ port operates at backplane transceiver logic (BTL) signal levels.
The logic element for data flow in each direction is configured by two mode inputs (IMODE1 and IMODE0 for B-to-A, OMODE1 and OMODE0 for A-to-B) as a buffer, a D-type flip-flop, or a D-type latch. When configured in the buffer mode, the inverted input data appears at the output port. In the flip-flop mode, data is stored on the rising edge of the appropriate clock input (CLKAB/LEAB or CLKBA/LEBA). In the latch mode, the clock inputs serve as active-high transparent latch enables.
Data flow in the B-to-A direction, regardless of the logic element selected, is further controlled by the LOOPBACK input
| SN74FB2033A | |
| Voltage Nodes(V) | 5 |
| A Side | TTL |
| B Side | BTL |
| Bus Drive(ma) | -3/100 |
| No. of Bits | 8 |
| th(ns) | 0.7 |
| tsu(ns) | 2.7 |
| Static Current | 70 |
| Rating | Catalog |
| Technology Family | FB |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74FB2033ARC | ACTIVE | 0 to 70 | 13.35 | 1ku | QFP (RC) | 52 | 96 | JEDEC TRAY (5+1) | FB2033A |
| SN74FB2033ARCR | ACTIVE | 0 to 70 | 13.35 | 1ku | QFP (RC) | 52 | 500 | LARGE T&R | FB2033A |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74FB2033ARC | TBD | CU SNPB | Level-2-240C-1 YEAR | SN74FB2033ARC | SN74FB2033ARC |
| SN74FB2033ARCR | TBD | CU SNPB | Level-2-240C-1 YEAR | SN74FB2033ARCR | SN74FB2033ARCR |
