SN74LS648 八路总线收发器和寄存器

SN74LS648 描述

These devices consist of bus transceiver circuits with 3-state or open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers on the low-to-high transition of the appropriate clock pin (CAB or CBA). The following examples demonstrate the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers.

Enable (G\) and direction (DIR) pins are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both

SN74LS648
Voltage Nodes(V) 5  
Vcc range(V) 4.75 to 5.25  
Input Level TTL  
Output Level TTL  
No. of Outputs 8  
Static Current 155  
Technology Family LS  
Rating Catalog 
SN74LS648 特性
SN74LS648 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LS648DW ACTIVE 0 to 70 5.85 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74LS648DWE4 ACTIVE 0 to 70 5.85 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74LS648DWG4 ACTIVE 0 to 70 5.85 | 1ku SOIC (DW) | 24 25 | TUBE  
SN74LS648 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LS648DW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS648DW SN74LS648DW
SN74LS648DWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS648DWE4 SN74LS648DWE4
SN74LS648DWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS648DWG4 SN74LS648DWG4
SN74LS648 应用技术支持与电子电路设计开发资源下载
  1. SN74LS648 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)