SN74LV393A-EP 增强型产品双路 4 位二进制计数器
The SN74LV393A contains eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. This device is designed for 2-V to 5.5-V VCC operation.
This device comprises two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK)\ input. The device changes state on the negative-going transition of the CLK\ pulse. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The SN74LV393A has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
| SN74LV393A-EP | |
| Rating | HiRel Enhanced Product |
| Technology Family | LV-A |
SN74LV393A-EP 特性
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –40°C to 105°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- 2-V to 5.5-V VCC Operation
- Max tpd of 14.5 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Partial-Power-Down-Mode Operation
- Dual 4-Bit Binary Counters With Individual Clocks
- Direct Clear for Each 4-Bit Counter
- Can Significantly Improve System Densities by Reducing Counter Package Count by 50 Percent
SN74LV393A-EP 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LV393ATPWREP | ACTIVE | -40 to 105 | 0.94 | 1ku | TSSOP (PW) | 14 | 2000 | LARGE T&R | |
| V62/04695-01XE | ACTIVE | -40 to 105 | 0.94 | 1ku | TSSOP (PW) | 14 | 2000 | LARGE T&R |
SN74LV393A-EP 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LV393ATPWREP | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LV393ATPWREP | SN74LV393ATPWREP |
| V62/04695-01XE | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | V62/04695-01XE | V62/04695-01XE |
SN74LV393A-EP 应用技术支持与电子电路设计开发资源下载
- SN74LV393A-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
