SN74LVC139A-Q1 汽车类二路 2 线路至 4 线路解码器/多路解复用器
This dual 2-line to 4-line decoder/demultiplexer is designed for 1.65-V to 3.6-V VCC operation.
The device comprises two individual 2-line to 4-line decoders in a single package. The active-low enable ((G)) input can be used as a data line in demultiplexing applications. This decoder/demultiplexer features fully buffered inputs, each of which represents only one normalized load to its driving circuit.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment
| SN74LVC139A-Q1 | |
| Rating | Automotive |
| Technology Family | LVC |
SN74LVC139A-Q1 特性
- Qualified for Automotive Applications
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 6.2 ns
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Level Per AEC-Q100 Classification
- 2000-V (H2) Human-Body Model
- 200-V (M3) Machine Model
- 1000-V (C5) Charged-Device Model
SN74LVC139A-Q1 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CLVC139AQPWRG4Q1 | ACTIVE | -40 to 125 | 0.20 | 1ku | TSSOP (PW) | 16 | 2000 | |
| SN74LVC139AQPWRQ1 | ACTIVE | -40 to 125 | 0.20 | 1ku | TSSOP (PW) | 16 | 2000 |
SN74LVC139A-Q1 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CLVC139AQPWRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CLVC139AQPWRG4Q1 | CLVC139AQPWRG4Q1 |
| SN74LVC139AQPWRQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC139AQPWRQ1 | SN74LVC139AQPWRQ1 |
SN74LVC139A-Q1 应用技术支持与电子电路设计开发资源下载
- SN74LVC139A-Q1 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
