This dual buffer/line driver is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G241 is designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
The SN74LVC2G241 is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is low and 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high and 2OE is low, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking or the current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
| SN74LVC2G241 | |
| Pin/Package | 8DSBGA |
| Operating Temperature Range(°C) | -40 to 85 |
| IOL(mA) | 32 |
| IOH(mA) | -32 |
| Input Level | CMOS |
| Vcc max(V) | 5.5 |
| Technology Family | LVC |
| Vcc min(V) | 1.65 |
| Approx. Price (US$) | 0.20 | 1ku |
| Output Level | CMOS |
| No. of Gates | 2 |
| Vcc range(V) | -0.5 to 6.5 |
| tpd max(ns) | 3.7 |
| ICC(uA) | 10 |
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVC2G241YZPR | ACTIVE | -40 to 85 | 0.22 | 1ku | DSBGA (YZD) | 8 | 3000 | LARGE T&R |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVC2G241YZPR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC2G241YZPR | SN74LVC2G241YZPR |
