SN74LVCH244A 具有三态输出的八路缓冲器/驱动器
SN74LVCH244A 描述
The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
| SN54LVCH244A | SN74LVCH244A | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 | 3.3, 2.7, 2.5, 1.8 |
| Vcc range(V) | 2.0 to 3.6 | 2.0 to 3.6 |
| Logic | True | True |
| Input Level | TTL/CMOS | TTL/CMOS |
| Output Level | LVTTL | LVTTL |
| Output Drive(mA) | -24/24 | |
| No. of Outputs | 8 | 8 |
| tpd max(ns) | 6.5 | |
| Static Current | 0.01 | |
| Rating | Military | Catalog |
| Technology Family | LVC | LVC |
SN74LVCH244A 特性
- Operate From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5.9 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Ioff Supports Partial-Power-Down Mode Operation
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LVCH244A 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVCH244ADW | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC(DW) | 24 | 25 | TUBE | LVC827A |
| SN74LVCH244ADWE4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC(DW) | 24 | 25 | TUBE | LVC827A |
| SN74LVCH244ADWG4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC(DW) | 24 | 25 | TUBE | LVC827A |
SN74LVCH244A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVCH244ADW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVCH244ADW | SN74LVCH244ADW |
| SN74LVCH244ADWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVCH244ADWE4 | SN74LVCH244ADWE4 |
| SN74LVCH244ADWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVCH244ADWG4 | SN74LVCH244ADWG4 |
SN74LVCH244A 应用技术支持与电子电路设计开发资源下载
- SN74LVCH244A 数据资料 dataSheet 下载.PDF
- TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
- CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
- Semiconductor Packing Methodology (PDF 3005 KB)
- 逻辑产品选择指南 2006/2007 （修订版 Z）(4462KB)
- 标准线性和逻辑产品 5 分钟指南 (786KB)
- 了解和解释标准逻辑数据表
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
