This bus buffer is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is high.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
SN74LVT125-Q1 | |
Voltage Nodes(V) | 3.3, 2.7 |
Vcc range(V) | 2.7 to 3.6 |
Logic | True |
Input Level | TTL/CMOS |
Output Level | LVTTL |
Output Drive(mA) | -32/32 |
No. of Outputs | 4 |
tpd max(ns) | 4.2 |
Static Current | 7 |
Rating | Automotive |
Technology Family | LVT |
器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN74LVT125QDRG4Q1 | ACTIVE | -40 to 125 | 1.15 | 1ku | SOIC (D) | 14 | 2500 | LVT125Q |
SN74LVT125QDRQ1 | ACTIVE | -40 to 125 | 1.15 | 1ku | SOIC (D) | 14 | 2500 | LVT125Q |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN74LVT125QDRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVT125QDRG4Q1 | SN74LVT125QDRG4Q1 |
SN74LVT125QDRQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVT125QDRQ1 | SN74LVT125QDRQ1 |