SN74LVTH16543 具有三态输出的 3.3V ABT 16 位寄存收发器
SN74LVTH16543 描述
The 'LVTH16543 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB\) input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches
|
SN74LVTH16543 |
Voltage Nodes(V) |
3.3, 2.7 |
Vcc range(V) |
2.7 to 3.6 |
Output Level |
LVTTL |
No. of Outputs |
16 |
Static Current |
2.56 |
Technology Family |
LVT |
Rating |
Catalog |
SN74LVTH16543 特性
- Members of the Texas Instruments WidebusTM Family
- State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Support Unregulated Battery Operation Down to 2.7 V
- Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
SN74LVTH16543 芯片订购指南
器件 |
状态 |
温度 |
价格(美元) |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
SN74LVTH16543DL |
ACTIVE |
-40 to 85 |
1.43 | 1ku |
SSOP (DL) | 56 |
20 | TUBE |
|
SN74LVTH16543DLR |
ACTIVE |
-40 to 85 |
1.43 | 1ku |
SSOP (DL) | 56 |
1000 | LARGE T&R |
|
SN74LVTH16543 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
SN74LVTH16543DL |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74LVTH16543DL |
SN74LVTH16543DL |
SN74LVTH16543DLR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
SN74LVTH16543DLR |
SN74LVTH16543DLR |
SN74LVTH16543 应用技术支持与电子电路设计开发资源下载
- SN74LVTH16543 数据资料 dataSheet 下载.PDF
- TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
- CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
- Semiconductor Packing Methodology (PDF 3005 KB)
- 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
- 标准线性和逻辑产品 5 分钟指南 (786KB)
- 了解和解释标准逻辑数据表
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)