ADS5272IPFP 8 通道 65MSPS 模数转换器

The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal referencesare provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.


ADS5270 ADS5271 ADS5272 ADS5273 ADS5277
Resolution(Bits) 12 12 12 12 10
Sample Rate (max) 40MSPS 50MSPS 65MSPS 70MSPS 65MSPS
Architecture Pipeline Pipeline Pipeline Pipeline Pipeline
Power Consumption(Typ)(mW) 907 957 983 1003 845
SINAD(dB) 70 70 71 70.8 61.7
SNR(dB) 70.5 70.5 71.1 71.1 61.7
SFDR(dB) 85 85 85 85 85
DNL(Max)(+/-LSB) 0.5 0.5 0.31 0.34 0.08
INL(Max)(+/-LSB) 0.6 0.6 0.41 0.43 0.09
No Missing Codes(Bits) 12 12 12 12 10
ENOB(Bits) 11.3 11.3 11.5 11.5 9.7
No. of Supplies 1 1 1 1 1
Analog Voltage AV/DD(Min)(V) 3.0 3.0 3.0 3.0 3.0
Analog Voltage AV/DD(Max)(V) 3.6 3.6 3.6 3.6 3.6
Logic Voltage DV/DD(Min)(V) 3.0 3.0 3.0 3.0 3.0
Logic Voltage DV/DD(Max)(V) 3.6 3.6 3.6 3.6 3.6
Input Configuration Range 2V (p-p) 2V (p-p) 2V (p-p) 2V (p-p) 2V (p-p)
Reference Mode Int and Ext Int and Ext Int and Ext Int and Ext Int and Ext
Rating Catalog Catalog Catalog Catalog Catalog
Pin/Package 80HTQFP 80HTQFP 80HTQFP 80HTQFP 80HTQFP
# Input Channels 8 8 8 8 8
Operating Temperature Range(°C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85
ADS5272IPFP 特性
ADS5272IPFP 芯片订购指南
器件 状态 温度 (oC) 价格(美元) 封装 | 引脚 封装数量 | 封装载体
ADS5272IPFP ACTIVE -40 to 85 68.60 | 1ku HTQFP (PFP) | 80 96 | JEDEC TRAY (10+1)
ADS5272IPFPG4 ACTIVE -40 to 85 68.60 | 1ku HTQFP (PFP) | 80 96 | JEDEC TRAY (10+1)
ADS5272IPFPT ACTIVE -40 to 85 68.60 | 1ku HTQFP (PFP) | 80 250 | SMALL T&R
ADS5272IPFPTG4 ACTIVE -40 to 85 68.60 | 1ku HTQFP (PFP) | 80 250 | SMALL T&R
ADS5272IPFP 应用技术支持与电子电路设计开发资源下载
  1. ADS5272IPFP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
  3. 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
  4. 所选封装材料的热学和电学性质 (PDF 645 KB)
  5. 高速数据转换 (PDF 1967 KB)
  6. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  7. A Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF 461 KB)
  8. A Spreadsheet for Calculating the Frequency Response of the ADS1250-54
  9. Understanding the ADS1251, ADS1253, and ADS1254 Input Circuitry (PDF 39 KB)
  10. Analog-to-Digital Converter Grounding Practices Affect System Performance (PDF 56 KB)
  11. Principles of Data Acquisition and Conversion (PDF 50 KB)
  12. Interleaving Analog-to-Digital Converters (PDF 64 KB)
  13. What Designers Should Know About Data Converter Drift (PDF 95 KB)
  14. Giving Delta-Sigma Converters a Gain Boost with a Front End Analog Gain Stage (PDF 70 KB)
  15. Programming Tricks for Higher Conversion Speeds Utilizing Delta Sigma Converters (PDF 105 KB)