ADS5281IPFPR 8-Channel, 12-bit, 50MSPS Analog-to-Digital Converter

	ADS5281	ADS5282	ADS5287
Resolution(Bits)	12	12	10
Sample Rate (max)	50MSPS	65MSPS	65MSPS
Architecture	Pipeline	Pipeline	Pipeline
Power Consumption(Typ)(mW)	512	616	616
SINAD(dB)	69.7	69.7	61.6
SNR(dB)	70	70	61.7
SFDR(dB)	85	85	85
DNL(Max)(+/-LSB)	0.75	0.75	0.5
INL(Max)(+/-LSB)	1.5	1.5	1.0
No Missing Codes(Bits)	12	12	12
ENOB(Bits)	11.3	11.3	9.94
No. of Supplies	2	2	2
Analog Voltage AV/DD(Min)(V)	3.0	3.0	3.0
Analog Voltage AV/DD(Max)(V)	3.6	3.6	3.6
Logic Voltage DV/DD(Min)(V)	1.7	1.7	1.7
Logic Voltage DV/DD(Max)(V)	1.9	1.9	1.9
Input Configuration Range	2V (p-p)	2V (p-p)	2V (p-p)
Reference Mode	Int and Ext	Int and Ext	Int and Ext
Rating	Catalog	Catalog	Catalog
Pin/Package	64VQFN, 80HTQFP	64VQFN	64VQFN
# Input Channels	8	8	8
Operating Temperature Range(°C)	-40 to 85	-40 to 85	-40 to 85

The ADS528x is a family of high-performance, low-power, octal channel analog-to-digital converters (ADCs). Available in either a 9mm × 9mm QFN package or an HTQFP-80 package, with serialized low-voltage differential signaling (LVDS) outputs and a wide variety of programmable features, the ADS528x is highly customizable for a diversity of applications and offers an unprecedented level of system integration. An application note, XAPP774 (available at www.xilinx.com), describes how to interface the serial LVDS outputs of TI's ADCs to Xilinx® field-programmable gate arrays (FPGAs). The ADS528x family is specified over the industrial temperature range of -40°C to +85°C.

ADS5281IPFPR 特性

Speed and Resolution Grades:
- ADS5281: 12-bit, 50MSPS
- ADS5282: 12-bit, 65MSPS
Power Dissipation:
- 48mW/Channel at 30MSPS
- 55mW/Channel at 40MSPS
- 64mW/Channel at 50MSPS
- 77mW/Channel at 65MSPS
70dBFS SNR at 10MHz IF
Analog Input Full-Scale Range: 2VPP
Low-Frequency Noise Suppression Mode
6dB Overload Recovery In One Clock
External and Internal (Trimmed) Reference
3.3V Analog Supply, 1.8V Digital Supply
Single-Ended or Differential Clock:
- Clock Duty Cycle Correction Circuit (DCC)
Programmable Digital Gain: 0dB to 12dB
Serialized DDR LVDS Output
Programmable LVDS Current Drive, Internal Termination
Test Patterns for Enabling Output Capture

ADS5281IPFPR 芯片订购指南

器件	状态	温度 (oC)	价格（美元）	封装 \| 引脚	封装数量 \| 封装载体
ADS5281IPFP	ACTIVE	-40 to 85	47.10 \| 1ku	HTQFP (PFP) \| 80	96 \| JEDEC TRAY (10+1)
ADS5281IPFPG4	ACTIVE	-40 to 85	47.10 \| 1ku	HTQFP (PFP) \| 80	96 \| JEDEC TRAY (10+1)
ADS5281IPFPR	ACTIVE	-40 to 85	46.10 \| 1ku	HTQFP (PFP) \| 80	1000 \| LARGE T&R
ADS5281IPFPRG4	ACTIVE	-40 to 85	46.10 \| 1ku	HTQFP (PFP) \| 80	1000 \| LARGE T&R
ADS5281IRGCR	ACTIVE	-40 to 85	46.10 \| 1ku	VQFN (RGC) \| 64	2000 \| LARGE T&R
ADS5281IRGCRG4	ACTIVE	-40 to 85	46.10 \| 1ku	VQFN (RGC) \| 64	2000 \| LARGE T&R
ADS5281IRGCT	ACTIVE	-40 to 85	47.10 \| 1ku	VQFN (RGC) \| 64	250 \| SMALL T&R
ADS5281IRGCTG4	ACTIVE	-40 to 85	47.10 \| 1ku	VQFN (RGC) \| 64	250 \| SMALL T&R