ADS5287 5.25V-2.7V 8 位 250KSPS 同步串行 ADC
ADS5287 同类产品
- CDCE62005 - Recommended clocking solution, providing low jitter clock outputs to maximize converter performance
|
ADS5281 |
ADS5282 |
ADS5287 |
| Resolution(Bits) |
12 |
12 |
10 |
| Sample Rate (max) |
50MSPS |
65MSPS |
65MSPS |
| Architecture |
Pipeline |
Pipeline |
Pipeline |
| Power Consumption(Typ)(mW) |
512 |
616 |
616 |
| SINAD(dB) |
69.7 |
69.7 |
61.6 |
| SNR(dB) |
70 |
70 |
61.7 |
| SFDR(dB) |
85 |
85 |
85 |
| DNL(Max)(+/-LSB) |
0.75 |
0.75 |
0.5 |
| INL(Max)(+/-LSB) |
1.5 |
1.5 |
1.0 |
| No Missing Codes(Bits) |
12 |
12 |
12 |
| ENOB(Bits) |
11.3 |
11.3 |
9.94 |
| No. of Supplies |
2 |
2 |
2 |
| Analog Voltage AV/DD(Min)(V) |
3.0 |
3.0 |
3.0 |
| Analog Voltage AV/DD(Max)(V) |
3.6 |
3.6 |
3.6 |
| Logic Voltage DV/DD(Min)(V) |
1.7 |
1.7 |
1.7 |
| Logic Voltage DV/DD(Max)(V) |
1.9 |
1.9 |
1.9 |
| Input Configuration Range |
2V (p-p) |
2V (p-p) |
2V (p-p) |
| Reference Mode |
Int and Ext |
Int and Ext |
Int and Ext |
| Rating |
Catalog |
Catalog |
Catalog |
| Pin/Package |
64VQFN, 80HTQFP |
64VQFN |
64VQFN |
| # Input Channels |
8 |
8 |
8 |
| Operating Temperature Range(°C) |
-40 to 85 |
-40 to 85 |
-40 to 85 |
ADS5287 说明
The ADS5287 is a high-performance, low-power, octal channel analog-to-digital converter (ADC). Available in a 9mm × 9mm QFN package, with serialized low-voltage differential signaling (LVDS) outputs and a wide variety of programmable features, the ADS5287 is highly customizable for a wide range of applications and offers an unprecedented level of system integration. An application note, XAPP774 (available at www.xilinx.com), describes how to interface the serial LVDS outputs of TI's ADCs to Xilinx® field-programmable gate arrays (FPGAs).The ADS5287 is specified over the industrial temperature range of -40°C to +85°C.
ADS5287 特性
- Speed and Resolution Grades:
- Power Dissipation:
- 46mW/Channel at 30MSPS
- 53mW/Channel at 40MSPS
- 62mW/Channel at 50MSPS
- 74mW/Channel at 65MSPS
- 61.7dBFS SNR at 10MHz IF
- Analog Input Full-Scale Range: 2VPP
- Low-Frequency Noise Suppression Mode
- 6dB Overload Recovery in One Clock
- External and Internal (Trimmed) Reference
- 3.3V Analog Supply, 1.8V Digital Supply
- Single-Ended or Differential Clock:
- Clock Duty Cycle Correction Circuit (DCC)
- Programmable Digital Gain: 0dB to 12dB
- Serialized DDR LVDS Output
- Programmable LVDS Current Drive, Internal Termination
- Test Patterns for Enabling Output Capture
- Straight Offset Binary or Two's Complement Output
ADS5287 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| ADS5287IRGCR |
ACTIVE |
-40 to 85 |
32.00 | 1ku |
VQFN (RGC) | 64 |
2000 | LARGE T&R |
AZ5287 |
| ADS5287IRGCRG4 |
ACTIVE |
-40 to 85 |
32.00 | 1ku |
VQFN (RGC) | 64 |
2000 | LARGE T&R |
AZ5287 |
| ADS5287IRGCT |
ACTIVE |
-40 to 85 |
32.00 | 1ku |
VQFN (RGC) | 64 |
250 | SMALL T&R |
AZ5287 |
| ADS5287IRGCTG4 |
ACTIVE |
-40 to 85 |
32.00 | 1ku |
VQFN (RGC) | 64 |
250 | SMALL T&R |
AZ5287 |
ADS5287 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| ADS5287IRGCR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
|
ADS5287IRGCR |
| ADS5287IRGCRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
ADS5287IRGCRG4 |
ADS5287IRGCRG4 |
| ADS5287IRGCT |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
|
ADS5287IRGCT |
| ADS5287IRGCTG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
ADS5287IRGCTG4 |
ADS5287IRGCTG4 |
ADS5287 应用技术支持与电子电路设计开发资源下载
- ADS5287 数据资料 dataSheet 下载.PDF
- TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- A
Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF
461 KB)
- A Spreadsheet for Calculating the Frequency Response of the
ADS1250-54
- Understanding the ADS1251, ADS1253, and ADS1254 Input
Circuitry (PDF 39 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
ADS5287 工具与软件
