AFE8405 宽带多载波接收器
The AFE8405 is a multichannel communications signal processor that provides analog-to-digital conversion and digital downconversion optimized for cellular base transceiver systems. The device supports UMTS, CDMA-1X, and TD-SCDMA air-interface cellular standards.
The AFE8405 provides up to 8 UMTS digital downconverter channels (DDC), 16 CDMA DDCs or 16 TD-SCDMA DDCs. The DDC channels are independent and operate simultaneously.
The AFE8405 DDCs have three input ports; one is hardwired to the internal 14-bit analog-to-digital converter (rxin_a) and two are 16-bit digital inputs (rxin_c, rxin_d). Each DDC channel can be programmed to accept data from any one of the three input ports; rxin_b is not used.
|
AFE8405 |
Analog Input BW (MHz) |
750 |
Power Consumption (Typ) (mW) |
2300 |
Resolution (Bits) |
14 |
Sample Rate (max) |
85 |
SNR (Typ) (dB) |
73.5 |
Narrowband Channels |
16 |
SINAD (dB) |
73 |
Analog Voltage AV/DD (Min) (V) |
3 |
Analog Voltage AV/DD (Max) (V) |
3.6 |
Logic Voltage DV/DD (Min) (V) |
3 |
Logic Voltage DV/DD (Max) (V) |
3.6 |
No. of Supplies |
2 |
Wideband Channels |
8 |
Input Resolution (Max) (Bits) |
16 |
Output Resolution (Max) (Bits) |
16 |
SFDR (Typ) (dB) |
85 |
AFE8405 特性
- 14-Bit 85-MSPS High-Performance Single ADC
- At fIN = 140 MHz, SNR ≥ 71 dBFS, SFDR ≥ 79 dBc
- At fIN = 70 MHz, SNR ≥ 73 dBFS, SFDR ≥ 85 dBc
- Independent Clocks for ADC and DDC With Built-In FIFO
- Programmable Closed-Loop VGA Control With 6-Bit Outputs for ADC
- Received Total Wideband Power (RTWP) Measurement for the Composite Power Across Carriers With Programmable Time Window for Measurement
- 8 UMTS Digital Downconverter (DDC) Channels or 16 CDMA/TD-SCDMA DDC Channels With Programmable 18-Bit Filter Coefficients
- Each DDC Channel Provides:
- Real or Complex DDC Inputs
- UMTS Mode Rx Filtering: 6-Stage CIC (m = 1 or 2), up to 40-Tap CFIR, up to 64-Tap PFIR
- CDMA Mode Rx Filtering: 6-Stage CIC (m = 1 or 2), up to 64-Tap CFIR, up to 64-Tap PFIR
- Individual Channel-Specific Power Measurements
- A Dedicated Final AGC
- Test Bus to Monitor Data at Different Stages of the DDC Signal Path
- 3.3-V Analog Supplies, 1.5-V Digital Core Supply, 3.3-V Digital I/O Supply
- 484-Ball Plastic BGA (23 mm \xB4 23 mm) With 1,0-mm Pitch
- Power Dissipation (Eight Active DDC Channels): 2.3 W
- APPLICATIONS
- Wireless Base Station Receiver
- Multi-Carrier Digital Receiver
AFE8405 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
AFE8405IZDQ |
ACTIVE |
-40 to 85 |
43.25 | 1ku |
BGA (ZDQ) | 484 |
60 | JEDEC TRAY (10+1) |
|
AFE8405 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
AFE8405IZDQ |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
AFE8405IZDQ |
AFE8405IZDQ |
AFE8405 工具与软件
培训内容 |
型号 |
软件/工具类型 |
AFE8405 Evaluation Module |
AFE8405EVM |
开发电路板/EVM |
AFE8405 应用技术支持与电子电路设计开发资源下载
- AFE8405 数据资料 dataSheet 下载.PDF
- TI 德州仪器RF/IF 和 ZigBee®解决方案选型与价格 . xls
- Junction Temperature of TRF1123 & TRF1223 & Recommended PCB Layout Guidelines (slwa038.HTM, 8 KB)
- A Planar, Balanced Approach to Increase Transmitter Linearity (slwa039.HTM, 8 KB)