AFE8406 宽带多载波接收器
The AFE8406 is a multichannel communications signal processor that provides analog–to–digital conversion and digital downconversion optimized for cellular base transceiver systems. The device supports UMTS, CDMA–1X and TD–SCDMA air interface cellular standards.
The AFE8406 provides up to 8 UMTS digital downconverter channels (DDC), 16 CDMA DDCs or 16 TD–SCDMA DDCs. The DDC channels are independent and operate simultaneously.
The AFE8406 DDCs have four input ports; two are hardwired to internal 14–bit analog–to–digital converters and two are 16–bit digital inputs. Each DDC channel can be programmed to accept data from any one of the four input ports
|
AFE8406 |
Analog Input BW (MHz) |
750 |
Power Consumption (Typ) (mW) |
2000 |
Resolution (Bits) |
14 |
Sample Rate (max) |
85 |
SNR (Typ) (dB) |
73.5 |
Narrowband Channels |
16 |
SINAD (dB) |
73 |
Analog Voltage AV/DD (Min) (V) |
3 |
Analog Voltage AV/DD (Max) (V) |
3.6 |
Logic Voltage DV/DD (Min) (V) |
3 |
Logic Voltage DV/DD (Max) (V) |
3.6 |
No. of Supplies |
2 |
Wideband Channels |
8 |
Input Resolution (Max) (Bits) |
16 |
Output Resolution (Max) (Bits) |
16 |
SFDR (Typ) (dB) |
85 |
AFE8406 特性
- 14–Bit 85–MSPS High–Performance Dual ADC
- Dual ADC Can Be Configured Into Single ADC
- At fin = 140 MHz, SNR 71 dBFS
- At fin = 140 MHz, SNR 79 dBc
- At fin = 70 MHz, SNR 73 dBFS, SFDR 85 dBc
- Independent Clocks for ADC and DDC With Built–In FIFO
- Programmable Closed Loop VGA Control With 6–Bit Outputs for Each ADC
- Received Total Wideband Power (RTWP) Measurement for the Composite Power Across Carriers With Programmable Time Window for Measurement
- 8 UMTS Digital Down Converter (DDC) Channels or 16 CDMA/TD–SCDMA DDC Channels With Programmable 18–Bit Filter Coefficients
- Each DDC Channel Provides:
- Real or Complex DDC Inputs
- UMTS Mode Rx Filtering: 6–Stage CIC (m = 1 or 2), up to 40–Tap CFIR, up to 64–Tap PFIR
- CDMA Mode Rx Filtering: 6–Stage CIC (m = 1 or 2), up to 64–Tap CFIR, up to 64–Tap PFIR
- Individual Channel Specific Power Measurements
- A Dedicated Final AGC
- Test Bus to Monitor Data at Different Stages of the DDC Signal Path
- 3.3–V Analog Supplies, 1.5–V Digital Core Supply, 3.3–V Digital I/O Supply
- 484–Ball Plastic BGA (23 mm × 23 mm) With 1,0–mm Pitch
- Power Dissipation (Eight Active DDC Channels): 2.7 W
- APPLICATIONS
AFE8406 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
AFE8406IZDQ |
ACTIVE |
-40 to 85 |
88.30 | 100u |
BGA (ZDQ) | 484 |
60 | JEDEC TRAY (10+1) |
|
AFE8406 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
AFE8406IZDQ |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
AFE8406IZDQ |
AFE8406IZDQ |
AFE8406 工具与软件
培训内容 |
型号 |
软件/工具类型 |
AFE8406 Evaluation Module |
AFE8406EVM |
开发电路板/EVM |
AFE8406 应用技术支持与电子电路设计开发资源下载
- AFE8406 数据资料 dataSheet 下载.PDF
- TI 德州仪器RF/IF 和 ZigBee®解决方案选型与价格 . xls
- Junction Temperature of TRF1123 & TRF1223 & Recommended PCB Layout Guidelines (slwa038.HTM, 8 KB)
- A Planar, Balanced Approach to Increase Transmitter Linearity (slwa039.HTM, 8 KB)