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CD4048B-MIL CMOS 多功能可扩展 8 输入门

CD4048B is an 8-input gate having four control inputs. Three binary control inputs - Ka, Kb, and Kc - provide the implementation of eight different logic functions. These functions are OR, NOR, AND, NAND, OR/AND, OR/NAND, AND/OR and AND/NOR.

A fourth control input, Kd, provides the user with a 3-state output. When control input Kd is high, the output is either a logic 1 or a logic 0 depending on the inner states. When control input Kd is low, the output is an open circuit. This feature enables the user to connect this device to a common bus line.

In addition to the eight input lines, an EXPAND input is provided that permits the user to increase the number of inputs into a CD4048B (see Fig. 2). For example, two CD4048Bs can be cascaded to provide a 16-input multifunction gate

	CD4048B-MIL
Voltage Nodes(V)	5, 10, 15
Rating	Catalog
Technology Family	CD4000

CD4048B-MIL 特性

• Three-state output
• Many logic functions available in one package
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V (full package-temperature range), 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range ) - 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
• Applications
  • Selection of up to 8 logic functions
  • Digital control of logic
  • General-purpose gating logic
    - Decoding
    - Encoding

CD4048B-MIL 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
CD4048BF3A	ACTIVE	-55 to 125	4.83 | 1ku	CDIP (JT) | 16	1 | TUBE

CD4048B-MIL 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD4048BF3A	TBD	A42	N/A for Pkg Type	CD4048BF3A	CD4048BF3A

CD4048B-MIL 应用技术支持与电子电路设计开发资源下载

1. CD4048B-MIL 数据资料 dataSheet 下载.PDF
2. TI 德州仪器门电路产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)