CD4059A CMOS 可编程 N 分频计数器

CD4059 standard "A" Series types are divide-by-N down-counters that can be programmed to divide an input frequency by any number "N" from 3 to 15,999. The output signal is a pulse one clock-cycle wide occurring at a rate equal to the input frequency divided by N. This single output has TTL drive capability. The down-counter is preset by means of 16 jam inputs.

The three Mode-Select Inputs Ka, Kb, and Kc determine the modulus ("divide-by" number) of the first and last counting sections in accordance with the truth table shown in Table 1. Every time the first (fastest) counting section goes through one cycle, it reduces by 1 the number that has been preset (jammed) into the three decades of the intermediate counting section and into the last counting section, which consists of flip-flops that are not needed for operating the first counting section

CD4059A
Voltage Nodes(V) 5, 10, 15  
Vcc range(V) 3.0 to 18.0  
Input Level CMOS  
Output Level CMOS  
Rating Catalog  
Technology Family CD4000
CD4059A 特性
CD4059A 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD4059AE ACTIVE -55 to 125 1.20 | 1ku PDIP(NT) | 24 25 | TUBE  
CD4059AEE4 ACTIVE -55 to 125 1.20 | 1ku PDIP(NT) | 24 25 | TUBE  
CD4059AM ACTIVE -55 to 125 1.20 | 1ku SOIC(DW) | 24 90 | TUBE  
CD4059AME4 ACTIVE -55 to 125 1.20 | 1ku SOIC(DW) | 24 90 | TUBE  
CD4059AMG4 ACTIVE -55 to 125 1.20 | 1ku SOIC(DW) | 24 90 | TUBE  
CD4059A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD4059AE Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD4059AE CD4059AE
CD4059AEE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD4059AEE4 CD4059AEE4
CD4059AM Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD4059AM CD4059AM
CD4059AME4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD4059AME4 CD4059AME4
CD4059AMG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD4059AMG4 CD4059AMG4
CD4059A 应用技术支持与电子电路设计开发资源下载
  1. CD4059A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)