CD4067B-MIL CMOS 单路 16 通道模拟多路复用器/多路解复用器

CD4067B and CD4097B CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range. The CD4067B is a 16-channel multiplexer with four binary control inputs, A, B, C, D, and an inhibit input, arranged so that any combination of the inputs selects one switch.

The CD4097B is a differential 8-channel multiplexer having three binary control inputs, A, B, C, and an inhibit input. The inputs permit selection of one of eight pairs of switches.

A logic "1" present at the inhibit input turns all channels off.

The CD4067B and CD4097B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (P and PWR suffixes).

CD4067B-MIL
Pd(Typ)(mW) -  
Configuration 1 X 1:16 MUX  
ron(max)(ohms) 240  
Technology Family CD4000  
Voltage Nodes(V) 5, 10, 15  
IL OFF(Max)(nA) +/-1000  
RON Mis-match(Max)(Ohms) 5  
ON Time(Max)(ns) 190  
OFF Time(Max)(ns) 130  
Rating Military  
Pin/Package 24CDIP  
Operating Temperature Range(°C) -55 to 125  
Vmin(V) 5  
Vmax(V) 18 
CD4067B-MIL 特性
CD4067B-MIL 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD4067BF ACTIVE -55 to 125 8.90 | 1ku CDIP (J) | 24 1 | TUBE  
CD4067BF3A ACTIVE -55 to 125 10.48 | 1ku CDIP (J) | 24 1 | TUBE  
CD4067B-MIL 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD4067BF TBD  A42   N/A for Pkg Type CD4067BF CD4067BF
CD4067BF3A TBD  A42   N/A for Pkg Type CD4067BF3A CD4067BF3A
CD4067B-MIL 应用技术支持与电子电路设计开发资源下载
  1. CD4067B-MIL 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)