CD4510B CMOS 可预设置的 BCD 加/减计数器

CD4510B Presettable BCD Up/Down Counter and the CD4516 Presettable Binary Up/Down Counter consist of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as counters. These counters can be cleared by a high level on the RESET line, and can be preset to any binary number present on the jam inputs by a high level on the PRESET ENABLE line. The CD4510B will count out of non-BCD counter states in a maximum of two clock pulses in the up mode, and a maximum of four clock pulses in the down mode.

If the CARRY-IN input is held low, the counter advances up or down on each positive-going clock transition. Synchronous cascading is accomplished by connecting all clock inputs in parallel and connecting the CARRY-OUT of a less significant stage to the CARRY-IN of a more significant stage

	CD4510B
Voltage Nodes(V)	5, 10, 15
Vcc range(V)	3.0 to 18.0
Input Level	CMOS
Output Level	CMOS
Rating	Catalog
Technology Family	CD4000

CD4510B 特性

Medium-speed operation - fCL = 8 NHz typ. at 10 V
Synchronous internal carry propagation
Reset and Preset capability
100% tested for quiescent current at 20 V
5-V, 10-V, and 15-V parametric ratings
Standardized, symmetrical output characteristics
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
         1 V at VDD = 5 V
         2 V at VDD = 10 V
      2.5 V at VDD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Up/Down difference counting
- Multistage synchronous counting
- Multistage ripple counting
- Synchronous frequency dividers

CD4510B ---BCD Type
CD4516B ---Binary Type

CD4510B 芯片订购指南

器件	状态	温度	价格	封装 \| 引脚	封装数量 \| 封装载体	丝印标记
CD4510BE	ACTIVE	-55 to 125	1.20 \| 1ku	PDIP (N) \| 16	25 \| TUBE
CD4510BEE4	ACTIVE	-55 to 125	1.20 \| 1ku	PDIP (N) \| 16	25 \| TUBE
CD4510BNSR	ACTIVE	-55 to 125	1.15 \| 1ku	SO (NS) \| 16	2000 \| LARGE T&R
CD4510BNSRE4	ACTIVE	-55 to 125	1.15 \| 1ku	SO (NS) \| 16	2000 \| LARGE T&R
CD4510BNSRG4	ACTIVE	-55 to 125	1.15 \| 1ku	SO (NS) \| 16	2000 \| LARGE T&R
CD4510BPW	ACTIVE	-55 to 125	1.20 \| 1ku	TSSOP (PW) \| 16	90 \| TUBE
CD4510BPWE4	ACTIVE	-55 to 125	1.20 \| 1ku	TSSOP (PW) \| 16	90 \| TUBE
CD4510BPWG4	ACTIVE	-55 to 125	1.20 \| 1ku	TSSOP (PW) \| 16	90 \| TUBE

CD4510B 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD4510BE	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD4510BE	CD4510BE
CD4510BEE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD4510BEE4	CD4510BEE4
CD4510BNSR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BNSR	CD4510BNSR
CD4510BNSRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BNSRE4	CD4510BNSRE4
CD4510BNSRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BNSRG4	CD4510BNSRG4
CD4510BPW	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BPW	CD4510BPW
CD4510BPWE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BPWE4	CD4510BPWE4
CD4510BPWG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD4510BPWG4	CD4510BPWG4

CD4510B 应用技术支持与电子电路设计开发资源下载

CD4510B 数据资料 dataSheet 下载.PDF
TI 德州仪器MSI 功能产品选型与价格 . xls
Logic Guide 2009 (PDF 4263 KB)
Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
CMOS Power Consumption and CPD Calculation (PDF 89 KB)
Designing With Logic (PDF 186 KB)
Live Insertion (PDF 150 KB)
Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
LOGIC Pocket Data Book (PDF 6001 KB)
HiRel Unitrode Power Management Brochure (PDF 206 KB)
Logic Cross-Reference (PDF 2938 KB)