CD4522B CMOS 可编程 BCD N 分频计数器
CD4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.
The CD4522B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
|
CD4522B |
| Voltage Nodes(V) |
5, 10, 15 |
| Vcc range(V) |
3.0 to 18.0 |
| Input Level |
CMOS |
| Output Level |
CMOS |
| Rating |
Catalog |
| Technology Family |
CD4000 |
CD4522B 特性
- Internally synchronous for high internal and external speeds
- Logic edge-clocked design — increments on positive Clock transition or on negative Clock inhibit transition.
- 100% tested for quiescent current at 20-V
- 5-V, 10-V, and 15-V parametric ratings
- Standard symmetrical output characteristics
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Applications:
- Frequency synthesizers
- Phase-locked loops
- Programmable down counters
- Programmable frequency dividers
CD4522B 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD4522BE |
ACTIVE |
-55 to 125 |
1.20 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
|
| CD4522BEE4 |
ACTIVE |
-55 to 125 |
1.20 | 1ku |
PDIP (N) | 16 |
25 | TUBE |
|
| CD4522BNSR |
ACTIVE |
-55 to 125 |
1.15 | 1ku |
SO (NS) | 16 |
2000 | LARGE T&R |
|
| CD4522BNSRE4 |
ACTIVE |
-55 to 125 |
1.15 | 1ku |
SO (NS) | 16 |
2000 | LARGE T&R |
|
| CD4522BNSRG4 |
ACTIVE |
-55 to 125 |
1.15 | 1ku |
SO (NS) | 16 |
2000 | LARGE T&R |
|
| CD4522BPW |
ACTIVE |
-55 to 125 |
1.20 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
|
| CD4522BPWE4 |
ACTIVE |
-55 to 125 |
1.20 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
|
| CD4522BPWG4 |
ACTIVE |
-55 to 125 |
1.20 | 1ku |
TSSOP (PW) | 16 |
90 | TUBE |
|
CD4522B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD4522BE |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4522BE |
CD4522BE |
| CD4522BEE4 |
Pb-Free (RoHS) |
CU NIPDAU |
N/A for Pkg Type |
CD4522BEE4 |
CD4522BEE4 |
| CD4522BNSR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BNSR |
CD4522BNSR |
| CD4522BNSRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BNSRE4 |
CD4522BNSRE4 |
| CD4522BNSRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BNSRG4 |
CD4522BNSRG4 |
| CD4522BPW |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BPW |
CD4522BPW |
| CD4522BPWE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BPWE4 |
CD4522BPWE4 |
| CD4522BPWG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD4522BPWG4 |
CD4522BPWG4 |
CD4522B 应用技术支持与电子电路设计开发资源下载
- CD4522B 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
