GC5328 具有集成数字预失真、数字上变频的宽带发送 IC 解决方案
The GC5328 is a lower-power version of the GC5322 wideband digital predistortion transmit processor. The GC5328 includes a digital upconverter (DUC) block, a crest factor reduction (CFR) block, a digital predistortion (DPD) block, feedback (FB) block, and capture buffer (CB) blocks.
The GC5328 GPP block receives the interleaved IQ data from the baseband input. The individual IQ channels are gain-adjusted in the GPP and routed to the DUC. The GPP and DUC can be bypassed to input a combined IQ signal. The DUC provides three stages of interpolation and a complex mixer. There are two DUC blocks. The output from the DUC blocks is combined in the sum chain. Each of the 1 to 12 DUC channels can be summed, and the composite signal can be scaled
|
GC5322 |
GC5325 |
GC5328 |
Baseband Input Clock (Max) (MHz) |
140 |
140 |
100 |
DPD Function (Y/N) |
Y |
Y |
Y |
CFR Function (Y/N) |
Y |
Y |
Y |
DUC Function (Y/N) |
Y |
N |
Y |
No. of Transmitter Ports |
1 |
1 |
1 |
Resolution of BB Input Port (Bits) |
18 |
18 |
18 |
Narrowband Channels (DUC) |
12 |
|
12 |
Wideband Channels (DUC) |
4 |
|
4 |
Operating Temperature Range (C) |
-40 to 85 |
-40 to 85 |
-40 to 85 |
No. of Supply Voltages |
3 |
3 |
3 |
Power Dissipation (Typ) (W) |
2.5 |
1.9 |
2.5 |
Pin/Package |
352BGA |
352BGA |
484BGA |
Approx. Price (US$) |
62.00 | 1ku |
56.00 | 1ku |
56.00 | 1ku |
DPD Expansion BW (Max) (MHz) |
140 |
140 |
100 |
CFR Input Sample Rate (Max) (MSPS) |
70 |
70 |
50 |
DUC Input Clock Rate (Max) (MHz) |
92.5 |
|
66 |
Core Supply Voltage (Typ) (V) |
1.2 |
1.2 |
1.2 |
I/O Supply Voltage 1 (Typ) (V) |
1.8 |
1.8 |
1.8 |
I/O Supply Voltage 2 (Typ) (V) |
3.3 |
3.3 |
3.3 |
GC5328 特性
- Integrated DUC, CFR, and DPD Solutions
- 40-MHz (28-Mhz) Signal Bandwidth, Third (Fifth)-Order
Expansion BW in DPD Section, Maximum Complex Rate 140 Mhz
- DUC: up to 12 CDMA2000 or TD-SCDMA, 4 W-CDMA, 3-10 MHz
or 1-20 MHz OFDMA Carriers
- CFR: Typically Meets 3GPP TS 25.141 <6.5-dB PAR, <8-dB PAR for OFDMA Signals
- DPD: Short-Term and Long-Term Memory Compensation
to 1 µs, Typical ACLR Improvement > 20 dB
- Single-Antenna TX Mode, Single or Shared Feedback
- 352-Ball S-PBGA Package, 27-mm × 27-mm
- 1.2-V Core, 1.8-V HSTL, 3.3-V I/O
- Typical Power Consumption < 2.5 W, Configuration Dependent
- Flexible DSP Algorithm Supports Existing and Emerging Wireless Standards
- Supports Direct Interface to TI High-Speed Data Converters
- APPLICATIONS
- 3GPP (W-CDMA) Base Stations
- 3GPP2 (CDMA2000) Base Stations
- WiMAX, WiBro, and LTE (OFDMA) Base Stations
- Multicarrier Power Amplifiers (MCPAs)
GC5328 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
GC5328IZER |
ACTIVE |
-40 to 85 |
56.00 | 1ku |
BGA (ZER) | 484 |
60 | JEDEC TRAY (10+1) |
|
GC5328 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
GC5328IZER |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
GC5328IZER |
GC5328IZER |
GC5328 工具与软件
培训内容 |
型号 |
软件/工具类型 |
GC5328 Evaluation Module |
GC5328EVM |
开发电路板/EVM |
GC5328 应用技术支持与电子电路设计开发资源下载
- GC5328 数据资料 dataSheet 下载.PDF
- TI 德州仪器RF/IF 和 ZigBee®解决方案选型与价格 . xls
- Junction Temperature of TRF1123 & TRF1223 & Recommended PCB Layout Guidelines (slwa038.HTM, 8 KB)
- A Planar, Balanced Approach to Increase Transmitter Linearity (slwa039.HTM, 8 KB)