PCI2050B PCI 至 PCI 桥接器
The Texas Instruments PCI2050B PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses operating at a maximum bus frequency of 66-MHz. Transactions occur between masters on one and targets on another PCI bus, and the PCI2050B allows bridged transactions to occur concurrently on both buses. The bridge supports burst mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.
The PCI2050B bridge is compliant with the PCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per extension slot by creating hierarchical buses. The PCI2050B provides two-tier internal arbitration for up to nine secondary bus masters and may be implemented with an external bus arbiter
|
PCI2050B |
| Intel-Compatible Part Number |
21150bc |
| Speed(MHz) |
66 |
| Expansion Interface(bits) |
32 |
| Hot-Swap |
Friendly |
| Supply Voltage(s)(V) |
3.3, 5 |
| Operating Temperature Range(�C) |
-40 to 85,0 to 70 |
| Pin/Package |
208LQFP, 257BGA MICROSTAR |
| Approx. Price (US$) |
9.50 | 1ku |
PCI2050B 特性
- Two 32-bit, 66-MHz PCI buses
- 3.3-V core logic with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments
- Internal two-tier arbitration for up to nine secondary bus masters and supports an external secondary bus arbiter
- Ten secondary PCI clock outputs
- Independent read and write buffers for each direction
- Burst data transfers with pipeline architecture to maximize data throughput in both directions
- Supports write combing for enhanced data throughput
- Up to three delayed transactions in both directions
- Supports the frame-to-frame delay of only four PCI clocks from one bus to another
- Bus locking propagation
- Predictable latency per PCI Local Bus Specification
- Architecture configurable for PCI Bus Power Management Interface Specification
- CompactPCI hot-swap functionality
- Secondary bus is driven low during reset
- VGA/palette memory and I/O decoding options
- Advanced submicron, low-power CMOS technology
- 208-terminal PDV, 208-terminal PPM, or 257-terminal MicroStar BGA™ package
PCI2050B 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| PCI2050BGHK |
ACTIVE |
0 to 70 |
9.50 | 1ku |
BGA MICROSTAR (GHK) | 257 |
90 | JEDEC TRAY (5+1) |
|
| PCI2050BIGHK |
ACTIVE |
-40 to 85 |
10.45 | 1ku |
BGA MICROSTAR (GHK) | 257 |
90 | JEDEC TRAY (5+1) |
|
| PCI2050BIPDV |
ACTIVE |
-40 to 85 |
10.45 | 1ku |
LQFP (PDV) | 208 |
36 | JEDEC TRAY (10+1) |
|
| PCI2050BIPDVG4 |
ACTIVE |
-40 to 85 |
10.45 | 1ku |
LQFP (PDV) | 208 |
36 | JEDEC TRAY (10+1) |
|
| PCI2050BIZHK |
ACTIVE |
-40 to 85 |
10.45 | 1ku |
BGA MICROSTAR (ZHK) | 257 |
90 | JEDEC TRAY (5+1) |
|
| PCI2050BPDV |
ACTIVE |
0 to 70 |
9.50 | 1ku |
LQFP (PDV) | 208 |
36 | JEDEC TRAY (10+1) |
|
| PCI2050BPDVG4 |
ACTIVE |
0 to 70 |
9.50 | 1ku |
LQFP (PDV) | 208 |
36 | JEDEC TRAY (10+1) |
|
| PCI2050BPPM |
NRND |
0 to 70 |
9.50 | 1ku |
QFP (PPM) | 208 |
24 | JEDEC TRAY (10+1) |
|
| PCI2050BZHK |
ACTIVE |
0 to 70 |
9.50 | 1ku |
BGA MICROSTAR (ZHK) | 257 |
90 | JEDEC TRAY (5+1) |
|
PCI2050B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| PCI2050BGHK |
TBD |
SNPB |
Level-3-220C-168 HR |
PCI2050BGHK |
PCI2050BGHK |
| PCI2050BIGHK |
TBD |
SNPB |
Level-3-220C-168 HR |
PCI2050BIGHK |
PCI2050BIGHK |
| PCI2050BIPDV |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
PCI2050BIPDV |
PCI2050BIPDV |
| PCI2050BIPDVG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
PCI2050BIPDVG4 |
PCI2050BIPDVG4 |
| PCI2050BIZHK |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
PCI2050BIZHK |
PCI2050BIZHK |
| PCI2050BPDV |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
PCI2050BPDV |
PCI2050BPDV |
| PCI2050BPDVG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
PCI2050BPDVG4 |
PCI2050BPDVG4 |
| PCI2050BPPM |
TBD |
CU |
Level-4-220C-72 HR |
PCI2050BPPM |
PCI2050BPPM |
| PCI2050BZHK |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
PCI2050BZHK |
PCI2050BZHK |
PCI2050B 应用技术支持与电子电路设计开发资源下载
- PCI2050B 数据资料 dataSheet 下载.PDF
- TI 德州仪器PCI选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
PCI2050B 工具和软件
