SLK2721 具有增强抖动容限的 OC-48/24/12/3 SONET SDH 多速率收发器
The SLK2721 device is a single chip, multirate transceiver that derives high-speed timing signals for SONET/ SDH-based equipment. The device performs clock and data recovery, serial-to-parallel/parallel-to-serial conversion, and a frame detection function conforming to the SONET/SDH standards.
The device can be configured to operate under OC-48, OC-24, OC-12, or OC-3 data rate through the rate selection pins or the autorate detection function. An external reference clock operating at 622.08 MHz is required for the recovery loop, and it also provides a stable clock source in the absence of serial data transitions.
The SLK2721 device accepts 4-bit LVDS parallel data/clock and generates a NRZ SONET/SDH-compliant signal at the OC-3, OC-12, OC-24, or OC-48 data rate
|
SLK2721 |
| Operating Temperature Range(C) |
-40 to 85 |
| Pin/Package |
100HTQFP |
| Clock Input(MHz) |
622 |
| OC Rate |
OC-48 w/FEC |
SLK2721 特性
- Fully Integrated SONET/SDH Transceiver to Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions
- Enhanced Jitter Tolerance Over SLK2701
- Supports 2.7 Gbps OC-48 FEC Rate, OC-48, OC-24, OC-12, Gigabit Ethernet, and OC-3 Data Rate With Autorate Detection
- Supports Transmit Only, Receiver Only, Transceiver and Repeater Functions in a Single Chip Through Configuration Pins
- Supports SONET/SDH Frame Detection
- On-Chip PRBS Generation and Verification
- Supports 4-Bit LVDS (OIF99.102) Electrical Interface
- Single 2.5-V Power Supply
- Interfaces to Back Plane, Copper Cables, or Optical Modules
- Hot Plug Protection
- Low Jitter PECL-Compatible Differential Serial Interface With Programmable De-Emphasis for the Serial Output
- On-Chip Termination for LVDS and PECL-Compatible Interface
- Receiver Differential Input Thresholds 150 mV Minimum
- Supports SONET Loop Timing
- Low Power <900 mW at OC-48 Data Rate
- ESD Protection >2 kV
- 622-MHz Reference Clock
- Maintains Clock Output in Absence of Data
- Local and Remote Loopback
- Parity Checking and Generation for the LVDS Interface
SLK2721 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SLK2721IPZP |
ACTIVE |
-40 to 85 |
39.35 | 1ku |
HTQFP (PZP) | 100 |
90 | EIAJ TRAY (10+1) |
|
| SLK2721IPZPG4 |
ACTIVE |
-40 to 85 |
39.35 | 1ku |
HTQFP (PZP) | 100 |
90 | EIAJ TRAY (10+1) |
|
SLK2721 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SLK2721IPZP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
SLK2721IPZP |
SLK2721IPZP |
| SLK2721IPZPG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
SLK2721IPZPG4 |
SLK2721IPZPG4 |
SLK2721 应用技术支持与电子电路设计开发资源下载
- SLK2721 数据资料 dataSheet 下载.PDF
- TI 德州仪器串行器和解串器选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SLK2721 工具和软件
