SM320C30 数字信号处理器
The SMJ320C30 internal busing and special digital signal processor (DSP) instruction set has the speed and flexibility to execute up to 50 MFLOPS. The SMJ320C30 device optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip. The emphasis on total system cost has resulted in a less expensive processor that can be designed into systems currently using costly bit-slice processors.
- SMJ320C30-40: 50-ns single-cycle execution time, 5% supply
- SMJ320C30-50: 40-ns single-cycle execution time, 5% supply
The SMJ320C30 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle
|
SM320C30 |
Frequency (MHz) |
50 |
MIPS |
25 |
MOPS |
50 MFLOPS |
Cycle Time (ns) |
40 |
Data / Program Memory Space (Words) |
16M |
RAM (Words) |
2K |
ROM (Words) |
4K |
Cache |
64 |
DMA (Ch) |
1 |
Timers |
2 |
Total Serial Ports |
2 |
Serial Ports |
2 |
Parallel Ports |
2 |
Rating |
Military |
SM320C30 特性
- –55°C to 125°C Operating Temperature Range, QML Processing
- Processed to MIL-PRF-38535 (QML)
- Performance
- SMJ320C30-40 (50-ns Cycle)
40 MFLOPS
20 MIPS
- SMJ320C30-50 (40-ns Cycle)
50 MFLOPS
25 MIPS
- Two 1K-Word × 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks
- Validated Ada Compiler
- 64-Word × 32-Bit Instruction Cache
- 32-Bit Instruction and Data Words, 24-Bit Addresses
- 40 / 32-Bit Floating-Point / Integer Multiplier and Arithmetic Logic Unit (ALU)
- Parallel ALU and Multiplier Execution in a Single Cycle
- On-Chip Direct Memory Access (DMA) Controller for Concurrent I/O and CPU Operation
- Integer, Floating-Point, and Logical Operations
- One 4K-Word × 32-Bit Single-Cycle Dual-Access On-Chip ROM Block
- Two 32-Bit External Ports (24- and 13-Bit Address)
- Two Serial Ports With Support for 8- / 16- / 24- / 32-Bit Transfers
- Packaging
- 181-Pin Grid Array Ceramic Package (GB Suffix)
- 196-Pin Ceramic Quad Flatpack With Nonconductive Tie-Bar (HFG Suffix)
- SMD Approval for 40- and 50-MHz Versions
SM320C30 芯片订购指南
器件 |
状态 |
温度 |
价格(美元) |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
SM320C30GBM40 |
ACTIVE |
-55 to 125 |
875.43 | 1ku |
CPGA (GB) | 181 |
1 | JEDEC TRAY (5+1) |
|
SM320C30GBM50 |
ACTIVE |
-55 to 125 |
962.96 | 1ku |
CPGA (GB) | 181 |
1 | JEDEC TRAY (5+1) |
|
SM320C30HFGM40 |
ACTIVE |
-55 to 125 |
962.96 | 1ku |
CFP (HFG) | 196 |
1 | JEDEC TRAY (5+1) |
|
SM320C30 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
SM320C30GBM40 |
TBD |
Call TI |
N/A for Pkg Type |
SM320C30GBM40 |
SM320C30GBM40 |
SM320C30GBM50 |
TBD |
Call TI |
N/A for Pkg Type |
SM320C30GBM50 |
SM320C30GBM50 |
SM320C30HFGM40 |
TBD |
Call TI |
N/A for Pkg Type |
SM320C30HFGM40 |
SM320C30HFGM40 |
SM320C30 应用技术支持与电子电路设计开发资源下载
- SM320C30 数据资料 dataSheet 下载.PDF
- TI 德州仪器其它 TMS320™;DSP选型与价格 . xls
- 320C3x, 320C4x, and 320MCM42x Power-Up Sensitivity at Cold Temperatures
- Setting Up TMS320 DSP Interrupts in 'C'
- Minimizing Quantization Effects Using the TMS320 DSP Family