SN65LVDM22 双路多路复用 LVDM 中继器

The SN65LVDM22 and SN65LVDS22 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0 and S1. This allows the flexibility to perform splitter or signal routing functions with a single device.

The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100- load.

The intended application of these devices and signaling technique is for both point-to-point baseband (single termination) and multipoint (double termination) data transmissions over controlled impedance media

	SN65LVDM22	SN65LVDS122	SN65LVDS22
No. of Rx	2	2	2
No. of Tx	2	2	2
Signaling Rate(Mbps)	250	1500	250
Supply Voltage(s)(V)	3.3	3.3	3.3
ICC(Max)(mA)	27	100	20
Pin/Package	16SOIC, 16TSSOP	16SOIC, 16TSSOP	16SOIC, 16TSSOP
Operating Temperature Range(°C)	-40 to 85	-40 to 85	-40 to 85
Peak-to-Peak Jitter(Max)(ps)		65
Output Signal	LVDM	LVDS	LVDS
Input Signal	LVDM	CML, LVDS, LVPECL	LVDS
Part-to-Part Skew(Max)(ps)		100
Rx tpd(Typ)(ns)	4	0.65	4
Tx tpd(Typ)(ns)	4	0.65	4
ESD HBM(kV)	12	4	12
Approx. Price (US$)	4.45 \| 1ku	3.75 \| 1ku	2.50 \| 1ku

SN65LVDM22 特性

Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
Designed for Clock Rates up to 200 MHz (400 Mbps)
Designed for Data Rates up to 250 Mbps
Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI
ESD Protection Exceeds 12 kV on Bus Pins
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With Output Voltages of 350 mV Into:
- 100- Load (SN65LVDM22)
- 50- Load (SN65LVDM22)
Propagation Delay Time; 4 ns Typ
Power Dissipation at 400 Mbps of 150 mW
Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
LVTTL Levels Are 5 V Tolerant
Open-Circuit Fail Safe Receiver

SN65LVDM22 芯片订购指南

器件	状态	温度	价格	封装 \| 引脚	封装数量 \| 封装载体	丝印标记
SN65LVDM22D	ACTIVE	-40 to 85	2.70 \| 1ku	SOIC (D) \| 16	40 \| TUBE
SN65LVDM22DG4	ACTIVE	-40 to 85	2.70 \| 1ku	SOIC (D) \| 16	40 \| TUBE
SN65LVDM22DR	ACTIVE	-40 to 85	2.25 \| 1ku	SOIC (D) \| 16	2500 \| LARGE T&R
SN65LVDM22DRG4	ACTIVE	-40 to 85	2.25 \| 1ku	SOIC (D) \| 16	2500 \| LARGE T&R
SN65LVDM22PW	ACTIVE	-40 to 85	2.70 \| 1ku	TSSOP (PW) \| 16	90 \| TUBE
SN65LVDM22PWG4	ACTIVE	-40 to 85	2.70 \| 1ku	TSSOP (PW) \| 16	90 \| TUBE
SN65LVDM22PWR	ACTIVE	-40 to 85	2.25 \| 1ku	TSSOP (PW) \| 16	2000 \| LARGE T&R
SN65LVDM22PWRG4	ACTIVE	-40 to 85	2.25 \| 1ku	TSSOP (PW) \| 16	2000 \| LARGE T&R

SN65LVDM22 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN65LVDM22D	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22D	SN65LVDM22D
SN65LVDM22DG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22DG4	SN65LVDM22DG4
SN65LVDM22DR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22DR	SN65LVDM22DR
SN65LVDM22DRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22DRG4	SN65LVDM22DRG4
SN65LVDM22PW	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22PW	SN65LVDM22PW
SN65LVDM22PWG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22PWG4	SN65LVDM22PWG4
SN65LVDM22PWR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22PWR	SN65LVDM22PWR
SN65LVDM22PWRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN65LVDM22PWRG4	SN65LVDM22PWRG4

SN65LVDM22 应用技术支持与电子电路设计开发资源下载

SN65LVDM22 数据资料 dataSheet 下载.PDF
TI 德州仪器LVDS/M-LVDS/ECL/CML选型与价格 . xls
所选封装材料的热学和电学性质 (PDF 645 KB)
使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
接口选择指南 (Rev. D) (PDF 2994 KB)
Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
Isolated RS-485 Reference Design (PDF 80 KB)
无铅组件涂层的保存期评估 (PDF 1305 KB)
Analog Signal Chain Guide (8.62 MB)
Industrial Interface IC Solutions (101 KB)